• Proceedings of the Optical Society of Korea Conference
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• 2005.07a
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• pp.204-205
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• 2005

Studies on display has been requested some major changes due to the high growth of the handheld terminal market. Therefore, the self emitting OLED(Organic Light Emitting Diode) has been interested as a next generation flat plane display because of its preeminent characteristics such as quick response characteristics, higher performance viewing angle, low power consumption, and panel floating. However, a trend of the display market is moving to three dimensional image processing instead of two dimensional flat display and various researches on display using hologram makes up for the difficulty in three dimensional display using typical flat display. In this study the Lenticular Screen Printing method is presented so that it can be applicable to organic semiconductor display devices and makes possible three dimensional display using flat display for complement the drawback of inorganic semiconductor.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.9
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• pp.663-670
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• 2001

This paper proposes a new power reduction method for 2D FIR (Finite Impulse Response) filters. We exploited the spatial redundancy of image data in order to reduce power dissipation in multiplication of FIR filters. Since the higher bits of input pixels are hardly changed, the redundant multiplication of higher bits is avoided by separating multiplication into higher and lower parts. The calculated values of higher bits are stored in memory cells, cache such that they can be reused when a cache hit occurs. Therefore, we can reduce power in 2D FIR Filter modules about 15% by using the proposed separated multiplication Technique (SMT).

• 전자공학회논문지 IE
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• v.46 no.4
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• pp.57-65
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• 2009

This paper presents the image contrast enhancement technique suitable for local dimming backlight of small-sized mobile display while achieving the reduction of the power consumption. In addition to the large-sized TFT-LCD, small-sized one has adopted LED for backlight. Since, conventionally, LED was mounted on the side edge of a display panel, global dimming method has been widely used. However, recently, new advanced method of local dimming by placing the LED to the backside of the display panel and it raised the necessity of sub-blocked processing after partitioning the target image. When the sub-blocked image has low brightness, the supply current of a backlight LED is reduced, which gives both enhancement of contrast ratio and power consumption reduction. In this paper, we propose simple and improved image enhancement algorithm suitable for the small-sized mobile display. After partitioning the input image by equal sized blocks and analyzing the pixel information in each block, we realize the primary contrast enhancement by independently processing the sub-blocks using the information such as histogram, mean, and standard deviation values of luminance(Y) component. And then resulting information is transferred to each backlight control unit for local dimming to realize the secondary contrast enhancement as well as reduction of power consumption.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.4
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• pp.237-243
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• 2007

In this paper, we propose the Real-time Dead-Pixel Detection and Compensation System for mobile camera and its hardware architecture. The CMOS image sensors as image input devices are becoming popular due to the demand for miniaturized, low-power and cost-effective imaging systems. However a conventional Dead-Pixel Detection Algorithm is disable to detect neighboring dead pixels and it degrades image quality by wrong detection and compensation. To detect dead pixels the proposed system is classifying dead pixels into Hot pixel and Cold pixel. Also, the proposed algorithm is processing line-detector and $5{\times}5$ window-detector consecutively. The line-detector and window-detector can search dead pixels by using one-dimensional(only horizontal) method in low frequency area and two-dimensional(vertical and diagonal) method in high frequency area, respectively. The experimental result shows that it can detect 99% of dead pixels. It was designed in Verilog hardware description language and total gate count is 23K using TSMC 0.25um ASIC library.

• Journal of Internet Computing and Services
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• v.21 no.2
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• pp.9-18
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• 2020

In the field of image processing, a method of detecting and counting passengers as moving objects when getting on and off the bus has been studied. Among these technologies, one of the artificial intelligence techniques, the deep learning technique is used. As another method, a method of detecting an object using a stereo vision camera is also used. However, these techniques require expensive hardware equipment because of the computational complexity of used to detect objects. However, most video equipments have a significant decrease in computational processing power, and thus, in order to detect passengers on the bus, there is a need for an image processing technology suitable for various equipment using a relatively low computational technique. Therefore, in this paper, we propose a technique that can efficiently obtain the number of passengers on the bus by detecting the contour of the object through the background subtraction suitable for low-cost equipment. Experiments have shown that passengers were counted with approximately 70% accuracy on lower-end machines than those equipped with stereo vision camera.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.22-32
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• 1997

This paper proposes an imprecise compuitation model for DCT considering QOS of images and a two dimensional DCT architecture for imprecise computations. In case that many processes are scheduling in a hard real time system, the system resources are shared among them. Thus all processes can not be allocated enough system resources (such as processing power and communication bandwidth). The imprecise computtion model can be used to provide scheduling flexibility and various QOS(quality of service)levels, to enhance fault tolerance, and to ensure service continuity in rela time systems. The DCT(discrete cosine transform) is known as one of popular image data compression techniques and adopted in JPEG and MPEG algorithms since the DCT can remove the spatial redundancy of 2-D image data efficiently. Even though many commercial data compression VLSI chips include the DCST hardware, the DCT computation is still a very time-consuming process and a lot of hardware resources are required for the DCT implementation. In this paper the DCT procedure is re-analyzed to fit to imprecise computation model. The test image is simulated on teh base of this model, and the computation time and the quality of restored image are studied. The row-column algorithm is used ot fit the proposed imprecise computation DCT which supports pipeline operatiions by pixel unit, various QOS levels and low speed stroage devices. The architecture has reduced I/O bandwidth which could make its implementation feasible in VLSI. The architecture is proved using a VHDL simulator in architecture level.

• Korean Journal of Fisheries and Aquatic Sciences
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• v.28 no.3
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• pp.294-300
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• 1995

In aquaculture industrial field, an automatic management and control system is needed to cope with the difficulties such as expensive wage, ripe age of management worker and risk according to the unexpected change of environmental conditions in the aquarium. This paper introduces an automatic aquarium monitoring and control system. The system is developed using PC single board computer. A PC can be connected to multi-single hoard computers, and the communication between PC and single board computers is based on RS-422/485 interfacing method. The physical data of pH, DO, temperature and water level etc. are real-timely treated in the single board computer though individual transducers, transfered to the main monitoring PC through RS-422/485 communication, and those data are graphically shown on the PC monitor. Furthermore, the environmental circumstance can be monitored through the image processing system, and the emergency system can be operated under the condition of environmental incident such as electric power stoppage, DO deficiency, pump shut down and low level water etc.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.3
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• pp.186-191
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• 2019

In this paper, we propose a implementation approach of the high-speed feature extraction algorithm. The proposed method is based on the block type classification algorithm which reduces the computation time when target macro block is divided to smooth block type that has no image features. It is quantitatively identified that occurs at 29.5% of the total image using 200 standard test images with $64{\times}64$ macro block size. This means that within a standard test image containing various image information, 29.5% can reduce the complexity of the operation. When the proposed approach is applied to the Canny edge detection, the required latency of the edge detection can be completely eliminated, such as 2D derivative filter, gradient magnitude/direction computation, non-maximal suppression, adaptive threshold calculation, hysteresis thresholding. Also, it is expected that operation time of the feature detection can be reduced by applying block type classification algorithm to various feature extraction algorithms in this way.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.2
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• pp.141-146
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• 2017

In this paper, a gradient magnitude hardware architecture based on hardware folding design method is proposed for low power image feature extraction. For the hardware complexity reduction, the projection vector chracteristic of gradient magnitude is applied. The proposed hardware architecture can be implemented with the small degradation of the gradient magnitude data quality. The FPGA implementation result shows the 41% of logic elements and 62% embedded multiplier savings compared with previous work using Altera Cyclone VI (EP4CE115F29C7N) FPGA and Quartus II v16.0 environment.

• The KIPS Transactions:PartB
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• v.13B no.2 s.105
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• pp.121-126
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• 2006

In this paper, we propose an approach to increase the power of clustering Web images by using high-level semantic features from text information relevant to Web images as well as low-level visual features of image itself. These high-level text features can be obtained from image URLs and file names, page titles, hyperlinks, and surrounding text. As a clustering engine, self-organizing map (SOM) proposed by Kohonen is used. In the SOM-based clustering using high-level text features and low-level visual features, the 200 images from 10 categories are divided in some suitable clusters effectively. For the evaluation of clustering powers, we propose simple but novel measures indicating the degrees of scattering images from the same category, and degrees of accumulation of the same category images. From the experiment results, we find that the high-level text features are more useful in SOM-based Web image clustering.