Two-dimensional DCT arcitecture for imprecise computation model

중간 결과값 연산 모델을 위한 2차원 DCT 구조

This paper proposes an imprecise compuitation model for DCT considering QOS of images and a two dimensional DCT architecture for imprecise computations. In case that many processes are scheduling in a hard real time system, the system resources are shared among them. Thus all processes can not be allocated enough system resources (such as processing power and communication bandwidth). The imprecise computtion model can be used to provide scheduling flexibility and various QOS(quality of service)levels, to enhance fault tolerance, and to ensure service continuity in rela time systems. The DCT(discrete cosine transform) is known as one of popular image data compression techniques and adopted in JPEG and MPEG algorithms since the DCT can remove the spatial redundancy of 2-D image data efficiently. Even though many commercial data compression VLSI chips include the DCST hardware, the DCT computation is still a very time-consuming process and a lot of hardware resources are required for the DCT implementation. In this paper the DCT procedure is re-analyzed to fit to imprecise computation model. The test image is simulated on teh base of this model, and the computation time and the quality of restored image are studied. The row-column algorithm is used ot fit the proposed imprecise computation DCT which supports pipeline operatiions by pixel unit, various QOS levels and low speed stroage devices. The architecture has reduced I/O bandwidth which could make its implementation feasible in VLSI. The architecture is proved using a VHDL simulator in architecture level.