Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Low Power Architecture of FIR Filter for 2D Image Filter

2D Image Filter에 적합한 저전력 FIR Filter의 구현

  • Han, Chang-Yeong (Dept. of Electronic Computer Science, Korea Advanced Institute of Science and Technology) ;
  • Park, Hyeong-Jun (Dept. of Electronic Computer Science, Korea Advanced Institute of Science and Technology) ;
  • Kim, Lee-Seop (Dept. of Electronic Computer Science, Korea Advanced Institute of Science and Technology)
  • 한창영 (한국과학기술원 전자전산학과) ;
  • 박형준 (한국과학기술원 전자전산학과) ;
  • 김이섭 (한국과학기술원 전자전산학과)
  • Published : 2001.09.01
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Abstract

This paper proposes a new power reduction method for 2D FIR (Finite Impulse Response) filters. We exploited the spatial redundancy of image data in order to reduce power dissipation in multiplication of FIR filters. Since the higher bits of input pixels are hardly changed, the redundant multiplication of higher bits is avoided by separating multiplication into higher and lower parts. The calculated values of higher bits are stored in memory cells, cache such that they can be reused when a cache hit occurs. Therefore, we can reduce power in 2D FIR Filter modules about 15% by using the proposed separated multiplication Technique (SMT).

본 논문은 여러 이산 신호 처리(Digital Signal Processing)에서 많이 사용되는 FIR Filter의 전력 소모를 줄이는 새로운 방법을 제안한다. FIR Filter에서 소모되는 전력 중 곱셈기가 차지하는 비중이 매우 높다라는 사실과 2D 영상에서 이웃한 픽셀 값의 공간 상관성이 높다라는 성질을 이용하였다. 곱셈기의 입력인 영상 데이터를 상대적으로 상관성이 높은 상위 비트(MSBs)와 상관성이 낮은 하위 비트(LSBs)로 구분하고, 각각에 대해서 필터링을 수행하도록 하였다. 또한, 입력의 상위 비트와 필터 계수와의 곱셈 결과는 캐쉬 (cache)에 저장하여 재사용함으로써 불필요한 상위 비트의 연산을 줄이도록 하였다. 이러한 방법을 SMT(Separated Multiplication Technique)라 부르기로 한다. FIR Filter를 사용함에 있어 제안된 SMT를 이용하였을 경우에 15%정도의 전력 이득 효과를 얻을 수 있었다.

Keywords

References

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