• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1998년도 추계종합학술대회 논문집
• /
• pp.1093-1096
• /
• 1998

The architecture and circuit design of low voltage, high performance barrel shifter is proposed in this paper. The proposed architecture consists of two arrays for byte and bit rotate/shift to perform 32-bit operation and is preferred for even bigger data length as it can be adapted for 64-bit extention with no increase of number of stages. NORA logic structure was used for circuit implementation to achieve the best performance in terms of speed, power and area. The complicated cloking control has been resolved with the ingenious design of clock dirver. The circuit simulation results in 3.05ns delay, 9.37㎽ power consumption at 1V, 160MHz operation when its implemented in low power $0.5\mu\textrm{m}$ CMOS technology.

• 한국전기전자재료학회논문지
• /
• 제25권1호
• /
• pp.53-57
• /
• 2012

In this paper, by designing 20 W class driving circuit for driving high-power LED (Light Emitting Diode), we are going to comparatively carry out the analysis of characteristics for power circuit according to each design method. In this case, 200 V 60 Hz was performed as input data. The electrical characteristics such as voltage, current and ripple are checked for constant current circuit and constant voltage circuit in the LED module. In addition, as the ripple has an influence on illumination of LED light, low temperature working (-20 [$^{\circ}C$]) and high temperature working(80 [$^{\circ}C$]) are measured to make sure the ripple characteristics in accordance with temperature. In low temperature operation -20 [$^{\circ}C$] measurements, both constant current circuit and constant-voltage circuit were less impacted on input fluctuation, whereas in the high temperature operation 80 [$^{\circ}C$], current voltage in constant voltage circuit was surge after 430 [hour]. Voltage current ripple of constant current circuit was much less than constant voltage circuit, therefore we can show that constant current circuit is more stable.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1998년도 하계학술대회 논문집 E
• /
• pp.1644-1646
• /
• 1998

High-Smokestacks have been the symbol of the thermal power plant. Those cause the thermal power plant to be damaged by lightening for reaching several hundreds meter. In this paper, we investigated the accident of low-voltage source circuit due to grounding potential rise by lightening via high-smokestack in practically driving power plant, described examination into the cause and the impulse analysis. We analysed the transient voltage by EMTP(ElectroMagnetic Transient Program) via modeling the grounding system of power plant. This theoretical results coincided with practical accidental state. Therefore, it was verified that we could apply the grounding system of power plant and substation with the distribution-circuit analysis(EMTP).

• ETRI Journal
• /
• 제29권6호
• /
• pp.785-793
• /
• 2007

In this paper, we present an integrated rail-to-rail fully differential operational transconductance amplifier (OTA) working at low-supply voltages (1.5 V) with reduced power consumption and showing high DC gain. An embedded adaptive biasing circuit makes it possible to obtain low stand-by power dissipation (lower than 0.17 mW in the rail-to-rail version), while the high DC gain (over 78 dB) is ensured by positive feedback. The circuit, fabricated in a standard CMOS integrated technology (AMS 0.35 ${\mu}m$), presents a 37 V/${\mu}s$ slew-rate for a capacitive load of 15 pF. Experimental results and high values of two quality factors, or figures of merit, show the validity of the proposed OTA, when compared with other OTA configurations.

• 전자공학회논문지A
• /
• 제33A권5호
• /
• pp.212-221
• /
• 1996

A CMOS comparator is designed for low voltage and low power operations. The proposed comparator consists of a preadmplifier followed by a regenerative latch. The preasmplifier reduces the power consumption to a half with the power-down mode and the dynamic offsets of the latch, which is affected by each device mismatch, is statistically analyzed. The circuit is designed and simulated using a 0.8.mu.m n-well CMOS process and the dissipated power is 0.16mW at a 20MHz clock speed based on a 3V supply.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2015년도 추계학술대회
• /
• pp.397-400
• /
• 2015

본 논문에서는 낮은 듀티 동작의 센서 노드를 위한 저비용 MPPT 제어기능을 갖는 빛에너지 하베스팅 회로를 제안한다. 환경, 구조물 모니터링 센서와 같은 연속적인 동작이 요구되지 않는 센서 노드가 어플리케이션이며, 기존의 MPPT(Maximum Power Point Tracking) 제어방법과 다르게 간단한 회로들을 이용하여 저비용 MPPT 제어 방법을 구현하였다. 제안된 MPPT 방법은 솔라셀의 개방회로전압과 MPP 전압간의 비례관계를 이용하여, 솔라셀의 개방회로 전압을 주기적으로 샘플링함으로써 최대 가용전력이 생성되는 지점을 추적하고 이를 부하로 전달한다. 제안된 회로는 $0.35{\mu}m\;CMOS$ 공정으로 설계되었으며, 칩 면적은 패드를 포함하여 $975{\mu}m{\times}1025{\mu}m$이다. 제작된 칩을 측정한 결과 주기적으로 솔라셀의 개방회로를 샘플링하여 솔라셀의 MPP를 실시간 추적하는 것을 확인하였다.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
• /
• pp.89-92
• /
• 2001

In this paper, a simple low-power CMOS current reference circuit is proposed. The reference circuit includes parasitic pnp BJTs and resistors. Temperature compensation is made by adding a current component proportional to a thermal voltage to a current component proportional to a base-to-emitter voltage. The designed circuit has been simulated using a 0.25${\mu}{\textrm}{m}$ n-well CMOS process parameters. The simulation results show that the reference current is 34.96$mutextrm{A}$$\pm$0.04$mutextrm{A}$ in the temperature range of -2$0^{\circ}C$ to 12$0^{\circ}C$ The reference current varies less than 0.6% when the power supply voltage changes from 2.5V to 3.5V For $V_{DD=5V}$ and T=3$0^{\circ}C$ the power consumption is 520㎼ during normal operation but reduces to 0.l㎻ during power-down mode.

• 한국마린엔지니어링학회:학술대회논문집
• /
• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
• /
• pp.304-309
• /
• 2005

This paper presents an electronic ballast using a step down converter, a low frequency inverter for high intensity short-arc discharge lamp. The proposed ballast is composed of a full-wave rectifier, a step down converter operated as a current source with power regulation and a low frequency inverter with external ignition circuit. The ignition circuit generates high voltage pulse of $3{\sim}5[kV]$ peak, 130[Hz] periodically. Moreover, it is able to reignite at regular intervals by protective circuit. As experimental results on the test, acoustic resonance phenomenon is eliminated by operating the low frequency square wave voltage and current. Lamp voltage, current and consumption power are measured 123.8[V], 8.1[A] and 1,002[W], respectively. It was confirmed that the designed ballast operate the lamp with a constant power.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2016년도 추계학술대회
• /
• pp.527-530
• /
• 2016

본 논문에서는 $0.35-{\mu}m$ standard CMOS 공정에서 낮은 전력을 소모하면서 낮은 전원전압에서 동작하는 곡률보상 기능을 갖는 기준전류/전압 발생 회로를 제안한다. 제안된 회로는 weak-inversion 영역에서 동작하는 MOS 트랜지스터들을 사용함으로써 1V 이하 전원전압에서 동작할 수 있다. 시뮬레이션 결과는 제안되는 곡률보상 기술을 사용하여 기존의 곡률보상 기능이 없는 BGR 회로들처럼 종 모양이 아닌 사인 곡선과 같은 모양을 나타내 작은 TC 값을 보여준다. 제안된 회로들은 모두 0.9V의 전원전압에서 동작한다. 먼저, 기준전압 발생 회로는 176nW 전력을 소모하며, 온도 계수는 $26.4ppm/^{\circ}C$이다. 기준전류 발생 회로는 194.3nW 전력을 소모하며, 온도 계수는 $13.3ppm/^{\circ}C$이다.

• ETRI Journal
• /
• 제29권1호
• /
• pp.70-78
• /
• 2007

A new low-voltage CMOS interface circuit with digital output for piezo-resistive transducer is proposed. An input current sensing configuration is used to detect change in piezo-resistance due to applied pressure and to allow low-voltage circuit operation. A simple 1-bit first-order delta-sigma modulator is used to produce an output digital bitstream. The proposed interface circuit is realized in a 0.35 ${\mu}m$ CMOS technology and draws less than 200 ${\mu}A$ from a single 1.5 V power supply voltage. Simulation results show that the circuit can achieve an equivalent output resolution of 9.67 bits with less than 0.23% non-linearity error.