• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.48 no.6
• /
• pp.18-26
• /
• 2011

Debates concerning the competitive edge of leading 3DTV technology of the shutter glasses (SG) 3D and the film-type patterned retarder (FPR) are flaring up. Although SG technology enables Full-HD 3D vision, it requires complex systems including the sync transmitter (emitter), the sync processor chip, and the LCD lens in the active shutter glasses. In addition, the transferred sync-signal is easily affected by the external noise and a 3DTV viewer may feel flicker-effect caused by cross-talk of the left and right image. The operating current of the sync processor in the 3DTV active shutter glasses is gradually increasing to compensate the sync reconstruction error. The proposed chip is a low-power hardware sync processor based discrete-event SoC(system on a chip) designed specifically for the 3DTV active shutter glasses. This processor implements the newly designed power-saving techniques targeted for low-power operation in a noisy environment between 3DTV and the active shutter glasses. This design includes a hardware pre-processor based on a universal edge tracer and provides a perfect sync reconstruction based on a floating-point timer to advance the prior commercial 3DTV shutter glasses in terms of their power consumption. These two techniques enable an accurate sync reconstruction in the slow clock frequency of the synchronization timer and reduce the power consumption to less than about a maximum of 20% compared with other major commercial processors. This article describes the system's architecture and the details of the proposed techniques, also identifying the key concepts and functions.

• Journal of Satellite, Information and Communications
• /
• v.10 no.2
• /
• pp.80-85
• /
• 2015

In this paper, we present, an indstrial RFID layered microstrip patch antenna is designed using an inset feed method in order to improve recognition rates in a long distance as tags are attached to metal object by improving a problem of feeding power in fabricating metal tags and reducing effects of metallic object. The inset feed shows a distinctive characteristic that has no separation between emitters and feed lines differing from a structure with the conventional inductive coupling feed. This structure makes possible to produce a type that presents a low antenna height and enables impedance coupling for tag chips. Although it shows a difficulty in the impedance coupling due to increases in the parasite capacitance between a ground plane and an emitter in an antenna according to decreases in the height of a tag antenna, it may become a merit in designing the tag antenna because the antenna impedance can be determined as an inductive manner if a shorted structure is used for feeding power. Therefore, in this paper the microstrip patch antenna is designed as a modified type and applies the inset feed in order to reduce effects of metallic objects where the antenna is be attached. Also, the antenna uses a multi-layer structure that includes a metal plate between radiator and ground instead of using a single layer.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2009.11a
• /
• pp.3-4
• /
• 2009

내장형 시스템 시장의 확대는 시스템의 전체 성능 향상뿐만 아니라 전력 소모량을 줄이는 것도 고려하게 만들었다. 특히 시스템 내부적으로 많은 비중을 차지하는 캐시 시스템의 전력 소모량을 줄이는 것은 내장형 시스템 설계의 중요한 주제 가운데 하나로 부각 되었다. 본 논문에서는 태그 압축을 통한 저전력 캐시의 구현을 제안한다. 제안된 기법은 지역성이 높은 내장형 응용 프로그램의 특징을 활용한 것으로, 지역 버퍼와 태그 압축 비트를 활용하는 새로운 형태의 저전력 캐시용 태그 압축 기법이다. 모의실험 결과, 본 논문에서 제안된 기법은 시스템의 전체적인 성능 감소 없이, 기존 모델 대비 최대 27%, 평균 18%의 캐시 에너지 감소를 보였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.26 no.1
• /
• pp.63-70
• /
• 2015

In this paper, a receiver has been developed in a $0.11-{\mu}m$ CMOS technology for 900 MHz RFID communication system applications. The receiver is composed of an envelope detector, a low-pass-filter, a comparator, D flip-flops, as well as an oscillator to provide the clock for digital blocks. The receiver is designed for low power consumption, which would be suitable for passive RFID tags. In this circuit, a digital data slicer was employed instead of the conventional analog data slicer in order to reduce the power consumption. The clock frequency is 1.68 MHz and the circuit operates with a power consumption as small as $5{\mu}W$. The chip size is $325{\mu}m{\times}290{\mu}m$ excluding the probing pads.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.1A
• /
• pp.58-64
• /
• 2006

A 900-MHz band transceiver has been developed for RFID reader applications. In the transmitter, a GaAs SPST switch is used for high speed switching and low power consumption. In the receiver, a double balanced mixer is used to compress even-harmonic products. The ASK demodulator which consists of an active filter and comparator is used to reject the unwanted in band interferers. The transceiver produces a maximum transmitting power of 30 dBm and exhibits an 5 m communication range with a 6-dBi gain antenna.

• Journal of National Security and Military Science
• /
• s.7
• /
• pp.271-303
• /
• 2009

"Ubiquitous sensor network" definition is this-Someone attaches electro-magnetic tag everything which needs communication between man to man, man to material and material to material(Ubiquitous). By using attached every electro-magnetic tag, someone detects it's native information as well as environmental information such as temperature, humidity, pollution and infiltration information(Sensor). someone connects it realtime network and manage generated information(Network). 21st century's war is joint combined operation connecting with ground, sea and air smoothly in digitalized war field, and is systematic war provided realtime information from sensor to shooter. So, it needs dramatic development on watch reconnaissance, command and control, pinpoint strike etc. Ubiquitous computing and network technologies are essential in national defense to operate 21st century style war. It is possible to use many parts such as USN combined smart dust and sensor network to protect friend unit as well as to watch enemy's deep area by unmanned reconnaissance, wearable computer upgrading soldier's operational ability and combat power dramatically, RFID which can be used material management as well as on time support. Especially, unmanned watch system using USN is core part to transit network centric military service and to get national defense efficiency which overcome the dilemma of national defense person resource reducing, and upgrade guard quality level, and improve combat power by normalizing guardian's bio rhythm. According to the test result of sensor network unmanned watch system, it needs more effort and time to stabilize because of low USN technology maturity and using maturity. In the future, USN unmanned watch system project must be decided the application scope such as application area and starting point by evaluating technology maturity and using maturity. And when you decide application scope, you must consider not only short period goal as cost reduction, soldier decrease and guard power upgrade but also long period goal as advanced defense ability strength. You must build basic infra in advance such as light cable network, frequency allocation and power facility etc. First of all, it must get budget guarantee and driving force for USN unmanned watch system project related to defense policy. You must forwarded the USN project assuming posses of operation skill as procedure, system, standard, training in advance. Operational skill posses is come from step by step application strategy such as test phase, introduction phase, spread phase, stabilization phase and also repeated test application taking example project.

• 전자공학회논문지 IE
• /
• v.47 no.3
• /
• pp.19-25
• /
• 2010

We developed a RFID terminal to voice guide the blind who have difficulties in reaching out to the pharmaceutical information. In this work, we used RFID technology to instruct the pharmaceutical information to the blind. The voice guidance reader was made to read the RFID tag attached to the drugs and announced the pharmaceutical information matching to the tag specific ID. We had the reader to obtain the pharmaceutical information from the ezDrug site operated by Korea Food & Drug Association. The voice guidance reader was fabricated as necklace type for the easy carry, and we added mp3 player as dual uses. ARM series Cortex M3 chip was used for the reader's core chip and low power MFRC523 chipset of NXP was used to construct RFID circuit. MFRC523 chip uses low power to meet the mobile application. We used VS1003B MP3 Decoder IC to make the voice generation circuit and CC2500 chipset for the wireless communication to the pharmaceutical information server. We also developed the system that can support ISO 14443A type and ISO 14443B type so that the system can be used to extend to various RFID protocols. Utilization of this system can conveniently convey the pharmaceutical information to the blind and reduce the drug abuse.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.9
• /
• pp.1993-1999
• /
• 2011

This paper describes a design of area-efficient/low-power cryptographic processor for HIGHT block cipher algorithm, which was approved as standard of cryptographic algorithm by KATS(Korean Agency for Technology and Standards) and ISO/IEC. The HIGHT algorithm, which is suitable for ubiquitous computing devices such as a sensor in USN or a RFID tag, encrypts a 64-bit data block with a 128-bit cipher key to make a 64-bit cipher text, and vice versa. For area-efficient and low-power implementation, we optimize round transform block and key scheduler to share hardware resources for encryption and decryption. The HIGHT64 core synthesized using a 0.35-${\mu}m$ CMOS cell library consists of 3,226 gates, and the estimated throughput is 150-Mbps with 80-MHz@2.5-V clock.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.1049-1054
• /
• 2005

With the growth of RFID market in logistics industry, such as post office, airline, shipping etc., development of RFID readers and tags becomes crucial. Especially, $860{\sim}960MHz$ RFID is worth noticing because of its long identification range and low production cost. Therefore, performance tests and verification of reader and/or tag under development are very important. In this paper, a RFID emulator system is designed and implemented using a commercial CAD tool, a signal generator and a data acquisition device. With the RFID emulator system, many parameters such as spectrum masks, transmit power levels, data waveform and other RF characteristics can be analyzed. Furthermore it can be applied to the verification of real RFID Readers or Tags.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.14 no.1
• /
• pp.344-365
• /
• 2020

Providing security has been always on priority in all areas of computing and communication, and for the systems that are low on computing power, implementing appropriate and efficient security mechanism has been a continuous challenge for the researchers. Radio Frequency Identification (RFID) system is such an environment, which requires the design and implementation of efficient security mechanism. Earlier, the security protocols for RFID based on hash functions and symmetric key cryptography have been proposed. But, due to high strength and requirement of less key size in elliptic curve cryptography, the focus of researchers has been on designing efficient security protocol for RFID based on elliptic curves. In this paper, an efficient elliptic curve signcryption based security protocol for RFID has been proposed, which provides mutual authentication, confidentiality, non-repudiation, integrity, availability, forward security, anonymity, and scalability. Moreover, the proposed protocol successfully provides resistance from replay attack, impersonation attack, location tracking attack, de-synchronization attack, denial of service attack, man-in-the-middle attack, cloning attack, and key-compromise attack. Results have revealed that the proposed protocol is efficient than the other related protocols as it takes less computational time and storage cost, especially for the tag, making it ideal to be used for RFID systems.