• Journal of the Institute of Electronics Engineers of Korea SD
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• 제39권8호
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• pp.42-45
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• 2002

A low power SDRAM output buffer with reduced power line noise and feedthrough current is presented. In multi I/O SDRAM output buffer, feedthrough current as well as the corresponding power dissipation are reduced utilizing proposed undershoot protection circuits. Ground bounce is minimized by the pull down driver using intelligent feedback scheme. Ground bounce noise is reduced by 66.3% and instantaneous and average power are reduced by 27.5% and 11.4%, respectively.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권2호
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• pp.85-90
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• 2012

This paper presents a topology structure and control method for an input-parallel-output-series(IPOS) inverter system which is suitable for high input current, high output voltage, and high power applications. In order to ensure the normal operation of the IPOS inverter system, the control method should achieve input current sharing(ICS) and output voltage sharing(OVS) among constituent modules. Through the analysis in this paper, ICS is automatically achieved as long as OVS is controlled. The IPOS inverter system is controlled by a three-loop control system which is composed of an outer common-output voltage loop, inner current loops and voltage sharing loops. Simulation results show that this control strategy can achieve low total harmonic distortion(THD) in the system output voltage, fast dynamic response, and good output voltage sharing performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제46권6호
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• pp.52-57
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• 2009

This paper presents a low-noise low-dropout linear regulator that is suitable for on-chip integration with RF transceiver ICs. In the bandgap reference, a stacked diode structure is adopted for saving silicon area as well as maintaining low output noise characteristic. Theoretical analysis for supporting the approach is also described. The linear regulator is fabricated in $0.18{\mu}m$ CMOS process. It operates with an input voltage range of 2.2 V - 5 V and provide the output voltage of 1.8 V and the output current up to 90 mA. The measured line and load regulation is 0.04%/V and 0.46%, respectively. The output noise voltage is measured to be 479 nV/$^\surd{Hz}$ and 186 nV/$^\surd{Hz}$ from 100 Hz and 1 kHz offset, respectively.

• Proceedings of the KIPE Conference
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.439-441
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• 2005

A new LLC resonant converter with multiple outputs is proposed for high efficiency and low cost plasma display panel (PDP) power module. In the proposed converter, ZVS turn-on of the primary MOSFETs and ZCS nun-off of the secondary diodes are guaranteed in the overall input voltage and output load range. Moreover, the primary MOSFETs and the secondary diodes have low voltage stresses clamped to input and the output voltage, respectively. Therefore, the proposed converter shows the high efficiency due to the minimized switching and conduction losses. In addition, by employing the transformer, which has the two and more secondary side, the proposed converter can have multiple outputs and they show the great cross-regulation characteristics. As a result, the proposed converter can be implemented with low cost and compact size. The 500W prototype is implemented, which integrates the sustaining and addressing power supplies of PDP power module. The maximum efficiency is 96.8% and the respective output voltages are well regulated. Therefore, the proposed converter is suitable for high efficiency and low cost PDP power module.

• The Transactions of the Korean Institute of Power Electronics
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• 제6권5호
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• pp.400-409
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• 2001

A new phase-shifted parallel-input/series-output(PISO) dual converter for tush-power step-up applications has been proposed. Since the proposed converter shows a low switch turn-off voltage stress, switching devices with low conduction loss can be employed in order to improve the power conversion efficiency. Moreover, it features a low output capacitor root-mean-square(RMS) current stress, low input current and output voltage ripple contents, and fast control-to-output dynamics compared to its PWM counterpart. In this paper, the operation of the proposed converter is analyzed in detail and its mathematical models and steady-state solutions are presented. A comparative analysis with the conventional PWM PISO dual converter is also provided. To confirm the operation, features, and validity of the Proposed converter, experimental results from an 800W, 24-350Vdc prototype are presented.

• Proceedings of the KIPE Conference
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.341-345
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• 2004

A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

• Journal of the Institute of Electronics Engineers of Korea TC
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• 제47권2호
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• pp.62-66
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• 2010

In this article, a oscillator at X-band with a double H-shape metamaterial resonator (DHMR) based on high-Q is proposed with metamaterial structure to improve Ihe phase noise and output power. The proposed oscillator is required low phase noise and high output power for the high performance frequency synthesizer. DHMR is designed to be high-Q at resonance frequency through strong coupling of E-field. This character makes phase noise excellent. The oscillator using DHMR is oscillated in X-band so as to apply frequency synthesizer of radar systems. The output power is 4.33 dBm and the phase noise is -108 dBc/Hz at 100 kHz offset of carrier frequency.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제2B권3호
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• pp.81-89
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• 2002

The sensorless AC motor drive is a popular topic of study due to the cost and reliability of speed and position sensors. Most sensorless algorithms are based on the mathematical modeling of motors including electrical variables such as phase current and voltage. Therefore, the accuracy of such variables largely affects the performance of the sensorless AC motor drive. However, the output voltage of the SVPWM-VSI, which is widely used in sensorless AC motor drives, has considerable errors. In particular, the SVPWM-VSI is error-prone in the low speed range because the constant DC link voltage causes poor resolution in a low output voltage command and the output voltage is distorted due to dead time and voltage drop. This paper investigates a novel high-performance strategy for overcoming these problems in a sensorless ac motor drive. In this paper, a variation of the DC link voltage and a direct compensation for dead time and voltage drop are proposed. The variable DC link voltage leads to an improved resolution of the inverter output voltage, especially in the motor's low speed range. The direct compensation for dead time and voltage drop directly calculates the duration of the switching voltage vector without the modification of the reference voltage and needs no additional circuits. In addition, the proposed strategy reduces a current ripple, which deteriorates the accuracy of a monitored current and causes torque ripple and additional loss. Simulation and experimentation have been performed to verify the proposed strategy.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제36권6호
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• pp.620-626
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• 2023

Energy harvesting technology, which converts wasted energy sources in everyday life into usable electric energy, is gaining attention as a solution to the challenges of charging and managing batteries for the driving of IoT sensors, which are one of the key technologies in the era of the fourth industrial revolution. Hybrid energy harvesting technology involves integrating two or more energy harvesting technologies to generate electric energy from multiple energy conversion mechanisms. In this study, a hybrid energy harvesting device called TMPPEG (thermo-magneto-piezoelectric-pyroelectric energy generator), which utilizes low-grade waste heat, was developed by incorporating PVDF polymer piezoelectric components and optimizing the system. The variations in piezoelectric output and thermoelectric output were examined based on the spacing of the clamps, and it was found that the device exhibited the highest energy output when the clamp spacing was 2 mm. The voltage and energy output characteristics of the TMPPEG were evaluated, demonstrating its potential as an efficient hybrid energy harvesting component that effectively harnesses low-grade waste heat.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.218-221
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• 2006

In this paper, a high-voltage generator with several mA draw output currents using LTPS-TFT technology is proposed. The new generator can be efficiently boosted about +18V output voltages with 5mA draw output currents and power efficiency ${\eta}$ is around 84% under the conditions of +5V power-supply voltage and 250kHz frequency.