Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Low-Noise Low Dropout Regulator in $0.18{\mu}m$ CMOS

$0.18{\mu}m$ CMOS 저 잡음 LDO 레귤레이터

  • Han, Sang-Won (Department of Wireless Communications Engineering, Kwangwoon University) ;
  • Kim, Jong-Sik (Department of Wireless Communications Engineering, Kwangwoon University) ;
  • Won, Kwang-Ho (Ubiquitous Computing Center, Korea Electronics Technology Institute) ;
  • Shin, Hyun-Chol (Department of Wireless Communications Engineering, Kwangwoon University)
  • 한상원 (광운대학교 전파공학과) ;
  • 김종식 (광운대학교 전파공학과) ;
  • 원광호 (전자부품연구원 유비쿼터스컴퓨팅센서) ;
  • 신현철 (광운대학교 전파공학과)
  • Published : 2009.06.25
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Abstract

This paper presents a low-noise low-dropout linear regulator that is suitable for on-chip integration with RF transceiver ICs. In the bandgap reference, a stacked diode structure is adopted for saving silicon area as well as maintaining low output noise characteristic. Theoretical analysis for supporting the approach is also described. The linear regulator is fabricated in $0.18{\mu}m$ CMOS process. It operates with an input voltage range of 2.2 V - 5 V and provide the output voltage of 1.8 V and the output current up to 90 mA. The measured line and load regulation is 0.04%/V and 0.46%, respectively. The output noise voltage is measured to be 479 nV/$^\surd{Hz}$ and 186 nV/$^\surd{Hz}$ from 100 Hz and 1 kHz offset, respectively.

본 논문은 CMOS RFIC 단일 칩을 위한 Bandgap Voltage Reference와 이를 포함한 저 잡음 Low Dropout (LDO) Regulator 회로에 관한 것이다. 저 잡음을 위해 Bandgap Voltage Reference에 사용된 BJT 다이오드의 유효면적을 증가시켜야 함을 LDO의 잡음해석을 통해 나타내었다. 이를 위해 다이오드를 직렬 연결하여 실리콘의 실제면적은 최소화 하면서 다이오드의 유효면적을 증가시키는 방법을 적용하였고, 이를 통해 LDO의 출력잡음을 줄일 수 있음을 확인하였다. $0.18{\mu}m$ CMOS 공정으로 제작된 LDO는 입력전압이 2.2 V 에서 5 V 일때 1.8 V의 출력전압에서 최대 90 mA의 전류를 내보낼 수 있다. 측정 결과 Line regulation은 0.04%/V 이고 Load regulation은 0.45%를 얻었으며 출력 잡음 레벨은 100 Hz와 1 kHz offset에서 각각 479 nV/$^\surd{Hz}$와 186 nV/$^\surd{Hz}$의 우수한 성능을 얻었다.

Keywords

References

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