• Title/Summary/Keyword: low output

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Electrical Characteristics of Piezoelectric Transformer using Low Temperature Sintering PCW-PMN-PZT Ceramics (저온소결 PCW-PMN-PZT 세라믹스를 적용한 압전변압기의 전기적 특성)

  • Chung, Kwang-Hyun;Yoo, Ju-Hyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.350-356
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    • 2006
  • In this study, piezoelectric transformer was manufactured at the sintering temperature of $950^{\circ}C$, and then the feasibility of application to low temperature sintering piezoelectric transformers was investigated by evaluating the electrical characteristics of it. The voltage ratio of piezoelectric transformer showed the maximum value at the resonant frequency of input part, and increased according to the increase of load resistance. The output power and efficiency of piezoelectric transformer showed the superior properties when the output impedance of it coincides with the load resistance. Piezoelectric transformer manufactured at the low temperature of $950^{\circ}C$ showed the heat generation less than $20^{\circ}C$ at the output power of 30 W, and stable driving characteristics.

A Low Power Multi Level Oscillator Fabricated in $0.35{\mu}m$ Standard CMOS Process ($0.35{\mu}m$ 표준 CMOS 공정에서 제작된 저전력 다중 발진기)

  • Chai Yong-Yoong;Yoon Kwang-Yeol
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.8
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    • pp.399-403
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    • 2006
  • An accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation when an external crystal is not available to provide a clock signal. Further, incorporation of the analog memory cell in the low power oscillator is fully implementable in a 0.35um Samsung standard CMOS process. Therefore, the analog memory cell incorporated into the low power oscillator avoids the previous problems in a oscillator by providing a temperature-stable, low power consumption, size-efficient method for generating an accurate reference clock signal that can be used to support long sleep mode operation.

A Prototype Development of Personal Low-frequency Stimulator with Characteristic Analysis (개인용 저주파 자극기의 특성분석 및 Prototype개발)

  • Lee, Gi-Song;Lee, Dong-Ha;Yu, Jae-Taek
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.349-352
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    • 2003
  • A personal low-frequency stimulator is a portable device to relax muscle pains of a person. The stimulator generates combined low-frequency pulses to be applied to pads attached to painful muscles. This paper reports a development of such device with its characteristic analyses. The major components of our stimulator are MCU, high-voltage generating circuit part, high-voltage switching circuit part, input switch part and display unit. High-voltage generating circuit is designed by using a boost converter circuit and allows user control of the output voltage. High-voltage switching circuit, controlled by MCU, generates output voltage to be applied to pads. Input switch part is composed of power supply, intensity selection, mode selection and memory. Display unit adopts a text LCD module to display modes, Intensity, output frequency and user set-up time. Our designed safety circuit, to protect human body from possible electric shock, slowly increases the output voltage to the selected output intensity. It continuously checks the output pulse shape and disable the output when dangerous pulses are detected. This paper also shows some experimental results.

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Low-ripple coarse-fine digital low-dropout regulator without ringing in the transient state

  • Woo, Ki-Chan;Yang, Byung-Do
    • ETRI Journal
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    • v.42 no.5
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    • pp.790-798
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    • 2020
  • Herein, a low-ripple coarse-fine digital low-dropout regulator (D-LDO) without ringing in the transient state is proposed. Conventional D-LDO suffers from a ringing problem when settling the output voltage at a large load transition, which increases the settling time. The proposed D-LDO removes the ringing and reduces the settling time using an auxiliary power stage which adjusts its output current to a load current in the transient state. It also achieves a low output ripple voltage using a comparator with a complete comparison signal. The proposed D-LDO was fabricated using a 65-nm CMOS process with an area of 0.0056 μ㎡. The undershoot and overshoot were 47 mV and 23 mV, respectively, when the load current was changed from 10 mA to 100 mA within an edge time of 20 ns. The settling time decreased from 2.1 ㎲ to 130 ns and the ripple voltage was 3 mV with a quiescent current of 75 ㎂.

Characteristic Impedances in Low-Voltage Distribution Systems for Power Line Communication

  • Kim, Young-Sung;Kim, Jae-Chul
    • Journal of Electrical Engineering and Technology
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    • v.2 no.1
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    • pp.29-34
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    • 2007
  • The input and output impedances in a low voltage distribution system is one of the most important matters for power line communication because from the viewpoint of communication, the attenuation characteristic of the high frequency signals is greatly caused by impedance mismatch during sending and receiving. The frequency range is from 1MHz to 30MHz. Therefore, this paper investigates the input and output impedances in order to understand the characteristic of high frequency signals in the low voltage distribution system between a pole transformer and an end user. For power line communication, the model of Korea's low voltage distribution system is proposed in a residential area and then the low voltage distribution system is set up in a laboratory. In the low voltage distribution system, S parameters are measured by using a network analyzer. Finally, input and output impedances are calculated using S parameters.

Design of the Ku-band Phase Locked Oscillator for high power and low phase noise. (고출력, 저위상잡음 Ku-대역 위상동기발진기설계)

  • 민상보;이영철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.8
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    • pp.1297-1304
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    • 2002
  • The phase locked oscillator having a low phase noise and high output in Ku-band was designed. To obtain the low phase noise and high output characteristics of oscillator, the nonlinear equivalent circuits of p-HEMT was analyzed by TOM method and we have decided the trade-off bias point between the low phase noise and the output power of oscillator. The designed phase locked oscillator with prescaler for stable operation, experiment results exhibits output power of 1003m with phase noise in the phase locked state of -824BC/HB at 10mz offset from 13.250Hz, and simulation result of 1003m output power in the phase noise -840Bc/Hz at 10KHz offset frequency respectively. a good agreement has been obtained between simulations and experiments results.

A Novel Ripple-Reduced DC-DC Converter

  • Tao, Yu;Park, Sung-Jun
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.396-402
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    • 2009
  • A DC/DC converter generally needs to work under high switching frequency when used as an adjustable power supply to reduce the size of magnetic elements such as inductors, transformers and capacitors, but with the rising of the switch frequency, the switch losses will increase and the efficiency will reduce. Recently, to solve these problems, research is actively being done on a soft switching method that can be applied under high frequency and on a PWM converter that can be applied under low frequency such as a multi-level topology. In this paper a novel DC-DC conversion method for reducing the ripple of output voltage is proposed. In the proposed converter, buck converters are connected in series to generate the output voltage. By using this method, the ripple of output voltage can be reduced compared to a conventional buck converter. Particularly when output voltage is low, the number of acting switching elements is less and the result of ripple reduction is more obvious. It is expected that the converter proposed in this paper could be very useful in the case of wide-range output voltage.

A Study on the SCR Frequency Converter With a Rotating Distributor (회전접촉자를 사용한 SCR 주파수 변환기에 관한 연구)

  • Chung Yon Tack
    • 전기의세계
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    • v.24 no.1
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    • pp.43-53
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    • 1975
  • This paper describes a converter, which combines SCR bridge type rectifier circuit with a rotating distributor. This type of converter produces an adjustable low frequency output of three phase or single phase, from three phase or single phase power source. Output-waveforms of this converter are multi-pulse in three phase output, and square wave in single phase output. Problems about the operation of static switches, a commutation and output-waveforms are investigated, and experimental results verify that frequency can be adjusted satisfactorily from zero to 20 (Hz) and the expected output-waveforms are obtained without sparking on the distributor under various loading conditions. This converter can be utilized to low speed control of A.C. motors, and other lowfrequency loads.

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Independently-Controlled Dual-Channel LED Driver using LLC Resonant Converter (LLC 공진형 컨버터를 이용한 독립제어 가능한 2 채널 LED 구동회로)

  • Hwang, Min-Ha;Choi, Yoon;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.2
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    • pp.142-149
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    • 2012
  • The independently regulated dual-output LLC resonant converter using only one power stage and one control IC is proposed in this paper. The conventional dual-output LLC resonant converter requires the extra non-isolated DC/DC converter to obtain the tightly regulated slave output voltage, which results in the low power conversion efficiency and high production costs. On the other hand, since the proposed converter controls the master and slave output voltages by pulse width modulation(PWM) and pulse frequency modulation(PFM), it can achieve tightly regulated dual output voltages without the additional non-isolated DC/DC converter. Therefore, it features a high efficiency and low cost. To confirm the validity of the proposed converter, theoretical analysis and experimental results from a 40W LED driver prototype are presented.

A Study on the Influence of the Dead Time Minimization Algorithm on the Low Output Voltages (저 전압 출력 영역에서 휴지기간 최소화 알고리즘의 영향 고찰)

  • Choi, Jung-Soo;Kim, Jin-Soo;Kim, Young-Seok
    • Proceedings of the KIEE Conference
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    • 1999.07f
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    • pp.2604-2606
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    • 1999
  • The dead time deteriorates the output performance of the PWM inverter so that various compensation schemes have been proposed. If the modulation index is rendered with the low output frequencies, those schemes do not work well because of the zero clamping phenomena. In this paper, we investigate the influence of the dead time minimization algorithm on the low output voltage reference. The validity of the algorithm is examined by comparing the simulation results with those of conventional methods.

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