• 대한전자공학회논문지SD
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• 제43권11호
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• pp.1-7
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• 2006

이상적인(ideal) 이중-게이트(double-gate) 벌크(bulk) FinFET의 3차원(3-D) 시뮬레이션을 수행하여 전기적 특성들을 분석하였다. 3차원 시뮬레이터를 이용하여, 게이트 길이($L_g$)와 높이($H_g$), 핀 바디(fin body)의 도핑농도($N_b$)를 변화시키면서 소스/드레인 접합 깊이($X_{jSDE}$)에 따른 문턱전압($V_{th}$), 문턱전압 변화량(${\Delta}V_{th}$), DIBL(drain induced barrier lowering), SS(subthreshold swing)의 특성들을 살펴보았다. 게이트 높이가 35 nm인 소자에서 소스/드레인 접합 깊이(25 nm, 35 nm, 45 nm) 변화에 따라, 각각의 문턱전압을 기준으로 게이트 높이가 $30nm{\sim}45nm$로 변화 될 때, 문턱전압변화량은 20 mV 이하로 그 변화량이 매우 적음을 알 수 있었다. 낮은 핀 바디 도핑농도($1{\times}10^{16}cm^{-3}{\sim}1{\times}10^{17}cm^{-3}$)에서, 소스/드레인 접합 깊이가 게이트전극보다 깊어질수록 DIBL과 SS는 급격히 나빠지는 것을 볼 수 있었고. 이러한 특성저하들은 $H_g$ 아래의 ${\sim}10nm$ 위치에 국소(local) 도핑을 함으로써 개선시킬 수 있었다. 또한 local 도핑으로 소스/드레인 접합 깊이가 얕아질수록 문턱전압이 떨어지는 것을 개선시킬 수 있었다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2013년도 추계학술대회
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• pp.713-716
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• 2013

전체 채널 길이는 같지만 드레인과 게이트사이의 진성영역 길이(Lin), 드레인 및 소스의 불순물 농도, 유전율, 유전체 두께가 다른 N-채널 Tunneling FET의 특성을 비교 분석하였다. 사용된 소자는 SOI 구조의 N-채널 Tunneling FET이다. 진성영역 길이는 30~70nm, 드레인 dose 농도는 $2{\times}10^{12}cm^{-2}{\sim}2{\times}10^{15}cm^{-2}$, 소스 dose 농도는 $1{\times}10^{14}cm^{-2}{\sim}3{\times}10^{15}cm^{-2}$, 유전율은 3.9~29이고, 유전체 두께는 3~9nm이다. 소자 성능 지수는 Subthreshold slope(S-slope), On/off 전류비, 누설전류이다. 시뮬레이션 결과 진성영역 길이가 길며 드레인 농도가 낮을수록 누설전류가 감소한 것을 알 수 있었다. S-slope은 소스의 불순물 농도와 유전율이 높으며 유전체 두께는 얇을수록 작은 것을 알 수 있었다. 누설전류와 S-slope을 고려하면 N-채널 TFET 소자 설계 시 진성영역 폭이 넓으며 드레인의 불순물 농도는 낮고, 소스 농도와 유전율이 높으며 유전체 두께는 얇게 하는 것이 바람직하다.

• 한국재료학회지
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• 제30권10호
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• pp.509-514
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• 2020

The two key variables of an Si solar cell, i.e., emitter (n-type window layer) and base (p-type substrate) doping levels or concentrations, are studied using Medici, a 2-dimensional semiconductor device simulation tool. The substrate is p-type and 150 ㎛ thick, the pn junction is 2 ㎛ from the front surface, and the cell is lit on the front surface. The doping concentration ranges from 1 × 10¹⁰ cm^-3 to 1 × 10²⁰ cm^-3 for both emitter and base, resulting in a matrix of 11 by 11 or a total of 121 data points. With respect to increasing donor concentration (Nd) in the emitter, the open-circuit voltage (Voc) is little affected throughout, and the short-circuit current (Isc) is affected only at a very high levels of Nd, exceeding 1 × 10¹⁹ cm^-3, dropping abruptly by about 12%, i.e., from Isc = 6.05 × 10^-9 A·㎛^-1, at Nd = 1 × 10¹⁹ cm^-3 to Isc = 5.35 × 10^-9 A·㎛^-1 at Nd = 1 × 10²⁰ cm^-3, likely due to minority-carrier, or hole, recombination at the very high doping level. With respect to increasing acceptor concentration (Na) in the base, Isc is little affected throughout, but Voc increases steadily, i.e, from Voc = 0.29 V at Na = 1 × 10¹² cm^-3 to 0.69 V at Na = 1 × 10¹⁸ cm^-3. On average, with an order increase in Na, Voc increases by about 0.07 V, likely due to narrowing of the depletion layer and lowering of the carrier recombination at the pn junction. At the maximum output power (Pmax), a peak value of 3.25 × 10^-2 W·cm^-2 or 32.5 mW·cm^-2 is observed at the doping combination of Nd = 1 × 10¹⁹ cm^-3, a level at which Si is degenerate (being metal-like), and Na = 1 × 10¹⁷ cm^-3, and minimum values of near zero are observed at very low levels of Nd ≤ 1 × 10¹³ cm^-3. This wide variation in Pmax, even within a given kind of solar cell, indicates that selecting an optimal combination of donor and acceptor doping concentrations is likely most important in solar cell engineering.

• 한국결정성장학회지
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• 제31권2호
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• pp.73-77
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• 2021

RF 마그네트론 스퍼터링 공정에 의해 Ga-doped ZnO 박막이 O2 및 Ar 분위기 하에서 증착 조건에 따라 합성되었으며, N2 분위기에서, 600℃에서 급속열처리(RTA)를 실시하였다. 증착된 ZnO : Ga 박막에 대해 두께를 측정하였고, XRD 패턴 분석에 의해 결정상을 조사하였으며, FE-SEM, AFM 이미지에 의해 박막의 미세구조를 관찰하였다. O2 및 Ar 분위기 기체 종류별로 형성된 박막들의 증착 조건에 따라 X-선 회절 패턴의 (002)면의 세기는 상당한 차이를 나타냈다. O2 조건에서는 Ga doping이 이루어진 단일 박막의 경우에서는 강한 세기의 회절피크가 관찰되었다. O2 및 Ar 조건에서는 Ga doping이 이루어진 다층박막의 경우에서는 다소 약한 세기의 (002) 면의 피크만을 나타내었다. FE-SEM image에서는 박막의 표면입자의 크기는 두께가 증가함에 따라 입자크기가 다소 증가하는 것으로 관찰되었다. O2 및 Ar 분위기 조건 하에서, Ga doping이 이루어진 다층박막의 경우에서는, 비저항은 6.4 × 10-4Ω·cm을 나타냈고, O2 분위기 조건하에서, Ga doping이 이루어진 단일 박막의 경우에서는 저항값이 감소하였고, Ga-doped ZnO 박막의 두께가 2 ㎛로 증가하면서 저항이 감소하였으며, 1.0 × 10-3 Ω·cm의 비교적 낮은 비저항 값을 나타내었다.

• 한국전기전자재료학회논문지
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• 제28권5호
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• pp.285-290
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• 2015

The phase change memory material is an active element in phase change memory and exhibits reversible phase transition behavior by thermal energy input. The doping of the phase change memory material with Ga leads to the increase of its crystallization temperature and the improvement of its amorphous stability. In this study, we investigated the effect of GaGe sputtering power on the formation of the phase change memory material including Ga. The deposition rate linearly increased to a maximum of 127 nm and the surface roughness remained uniform as the GaGe sputtering power increased in the range from 0 to 75 W. The Ga concentration in the thin film material abruptly increased at the critical sputtering power of 60 W. This influence of GaGe sputtering power was confirmed to result from a combined sputtering-evaporation process of Ga occurring due to the low melting point of Ga ($29.77^{\circ}C$).

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.192-198
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• 2017

In this paper, we propose a novel double gate vertical channel tunneling field effect transistor (DVTFET) with a dielectric sidewall and optimization characteristics. The dielectric sidewall is applied to the gate region to reduced ambipolar voltage ($V_{amb}$) and double gate structure is applied to improve on-current ($I_{ON}$) and subthreshold swing (SS). We discussed the fin width ($W_S$), body doping concentration, sidewall width ($W_{side}$), drain and gate underlap distance ($X_d$), source doping distance ($X_S$) and pocket doping length ($X_P$) of DVTFET. Each of device performance is investigated with various device parameter variations. To maximize device performance, we apply the optimum values obtained in the above discussion of a optimization simulation. The optimum results are steep SS of 32.6 mV/dec, high $I_{ON}$ of $1.2{\times}10^{-3}A/{\mu}m$ and low $V_{amb}$ of -2.0 V.

• 한국재료학회지
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• 제15권5호
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• pp.313-317
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• 2005

The relation between bulk microdefect (BMD) and mechanical strength of $P/P^-$ epitaxial silicon wafers (Epitaxial wafer) as a function of nitrogen concentrations was studied. After 2 step anneal$(800^{\circ}C/4hrs+1000^{\circ}C/16hrs)$, BMD was not observed in nitrogen undoped epitaxial silicon wafer while BMD existed and increased up to $3.83\times10^5\;ea/cm^2$ by addition of $1.04\times10^{14}\;atoms/cm^3$ nitrogen doping. The slip occurred for nitrogen undoped and low level nitrogen doped epitaxial wafers. However, there was no slip occurrence above $7.37\times10^{13}\;atoms/cm^3$ nitrogen doped epitaxial wafer. Mechanical strength was improved from 40 to 57 MPa as nitrogen concentrations were increased. Therefore, the nitrogen doping in silicon wafer plays an important role to improve BMD density, slip occurrence and mechanical strength of the epitaxial silicon wafers.

• 한국전기전자재료학회논문지
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• 제22권8호
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• pp.637-640
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• 2009

In this work, we demonstrate 800 V 4H-SiC power DMOSFETs with several structural alterations to obtain a low threshold voltage ($V_{TH}$) and a high figure of merit ($V_B\;^2/R_{SP,ON}$), To optimize the device performance, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. These parameters are optimized using 2D numerical simulation and the 4H-SiC DMOSFET structure results in a threshold voltage ($V_{TH}$) below $^{\sim}$3.8 V, and high figure of merit ($V_B\;^2/R_{SP,ON}$>$^{\sim}$200 $MW/cm^2$) for a power MOSFET in $V_B\;^{\sim}$800 V range.

• 한국세라믹학회지
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• 제45권12호
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• pp.760-765
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• 2008

In this study, the effects of small amounts (${\leq}3\;mol%$) of Li doping on the sintering characteristics and electrochemical performance of $(ZrO_2)_{0.89}(ScO_{1.5})_{0.1}(CeO_2)_{0.01}$ (ScSZ) were investigated. By adding 3 mol% lithium, the densification temperature of ScSZ was reduced from the conventional temperature of $1400^{\circ}C$ to $1200^{\circ}C$. It was found that Li doping also led to changes in the Zr:Sc ratio at the grain boundaries. Correspondingly, the dispersion of lithium zirconia at the grain boundaries accelerated the growth of ScSZ grains and increased the grain boundary resistance at temperatures below $450^{\circ}C$. At elevated temperatures of $450{\sim}750^{\circ}C$, the electrical conductivity of the ScSZ after doping remained almost unchanged under air and reducing atmospheres. These results suggest that the addition of lithium is promising for use in low temperature co-firing of ScSZ-based components for intermediate temperature solid oxide fuel cells.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.382.1-382.1
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• 2014

Graphene field-effect transistors (GFET) is one of candidates for future high speed electronic devices since graphene has unique electronic properties such as high Fermi velocity (vf=10^6 m/s) and carrier mobility ($15,000cm^2/V{\cdot}s$) [1]. Although the contact property between graphene and metals is a crucial element to design high performance electronic devices, it has not been clearly identified. Therefore, we need to understand characteristics of graphene/metal contact in the GFET. Recently, it is theoretically known that graphene on metal can be doped by presence of interface dipole layer induced by charge transfer [2]. It notes that doping type of graphene under metal is determined by difference of work function between graphene and metal. In this study, we present the GFET fabricated by contact metals having high work function (Pt, Ni) for p-doping and low work function (Ta, Cr) for n-doping. The results show that asymmetric conductance depends on work function of metal because the interfacial dipole is locally formed between metal electrodes and graphene. It induces p-n-p or n-p-n junction in the channel of the GFET when gate bias is applied. In addition, we confirm that charge transfer regions are differently affected by gate electric field along gate length.