• Title/Summary/Keyword: loop bandwidth

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A Low Phase Noise Phase Locked Loop with Current Compensating Scheme (전류보상 기법을 이용한 낮은 위상 잡음 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig;Ryu, Ji-Goo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.74-80
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    • 2006
  • This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise performance. The proposed PLL has two Charge Pump (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppress the voltage fluctuation of LF. In result, it improves phase noise characteristic. The Proposed PLL has been fabricated with 0.35fm 3.3V CMOS process. Measured phase noise at 1-MHz offset is -103dBc/Hz resulting in a minimum 3dBc/Hz phase noise improvement compared to the conventional PLL.

0.11-2.5 GHz All-digital DLL for Mobile Memory Interface with Phase Sampling Window Adaptation to Reduce Jitter Accumulation

  • Chae, Joo-Hyung;Kim, Mino;Hong, Gi-Moon;Park, Jihwan;Ko, Hyeongjun;Shin, Woo-Yeol;Chi, Hankyu;Jeong, Deog-Kyoon;Kim, Suhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.411-424
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    • 2017
  • An all-digital delay-locked loop (DLL) for a mobile memory interface, which runs at 0.11-2.5 GHz with a phase-shift capability of $180^{\circ}$, has two internal DLLs: a global DLL which uses a time-to-digital converter to assist fast locking, and shuts down after locking to save power; and a local DLL which uses a phase detector with an adaptive phase sampling window (WPD) to reduce jitter accumulation. The WPD in the local DLL adjusts the width of its sampling window adaptively to control the loop bandwidth, thus reducing jitter induced by UP/DN dithering, input clock jitter, and supply/ground noise. Implemented in a 65 nm CMOS process, the DLL operates over 0.11-2.5 GHz. It locks within 6 clock cycles at 0.11 GHz, and within 17 clock cycles at 2.5 GHz. At 2.5 GHz, the integrated jitter is $954fs_{rms}$, and the long-term jitter is $2.33ps_{rms}/23.10ps_{pp}$. The ratio of the RMS jitter at the output to that at the input is about 1.17 at 2.5 GHz, when the sampling window of the WPD is being adjusted adaptively. The DLL consumes 1.77 mW/GHz and occupies $0.075mm^2$.

A study on Circuit Design and Performance Evaluation of the IMT-2000 for Wideband CDMA (광대역 CDMA를 이용한 IMT-2000 회로 설계 및 성능 평가에 관한 연구)

  • 이흥기;김기문
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.2
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    • pp.329-337
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    • 1999
  • In this dissertation, the characteristics of W-CDMA(Wideband CDMA) are studied and required specifications of IMT-2000 transceiver using W-CDMA method are proposed. Also, in order to design the RF circuits satisfied the proposed specifications, theoretical models are expanded and real circuits are made. Then the RF circuits of the mobile stations are implemented in the three parts, transmitter, receiver and frequency synthesizer and are evaluated. The frequency synthesizer is designed using techniques of swallow counter and passive 3rd loop filter. For improving characteristics of the loop, a LPF was added to the 2nd loop filter. So although the locking times are loosed, the spurious are reduced. The output power of transmitter is over 50mW, the spurious output is -40dB/30kHz at 5MHz offset and power control range is -20dB at 2.5V. The proposed specifications are considered in highly practical environment and the theoretical designs and the experiments are expressed as simply as possible in order to facilitate understanding. It stands to reason that the results of this study can be used to design the wider CDMA(25MHz Bandwidth) mobile communication systems.

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A Reference Spur Suppressed PLL with Two-Symmetrical Loops (기준 신호 스퍼의 크기를 줄인 두 개의 대칭 루프를 가진 위상고정루프)

  • Choi, Hyun-Woo;Choi, Young-Shig
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.5
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    • pp.99-105
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    • 2014
  • A reference spur suppressed PLL with two-symmetrical loops without changing the bandwidth which is optimized to suppress phase noise and reduce locking time has been designed. The principle of suppressing a reference signal spur is to stabilize the input voltage of voltage controlled oscillator (VCO). The proposed PLL consists of a phase-frequency detector(PFD) which has two outputs, two charge pumps(CP), two loop filters(LF), a divider and a VCO which has two inputs. Simulation results with $0.18{\mu}m$ CMOS process show that the reference spur is approximately suppressed to 1/2 of the reference spur in a conventional PLL. Even though there is a 5% process variation in the magnitude of R and C, the simulation result shows that the reference spur is still suppressed to 1/2 of the reference spur in a conventional PLL. The power consumption is 6.3mW at the power supply of 1.8V.

A Low Jitter Dual Output Frequency Synthesizer Using Phase-Locked Loop for Smart Audio Devices (위상고정루프를 이용한 낮은 지터 성능을 갖는 스마트 오디오 디바이스용 이중 출력 주파수 합성기 설계)

  • Baek, Ye-Seul;Lee, Jeong-Yun;Ryu, Hyuk;Lee, Jongyeon;Baek, Donghyun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.2
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    • pp.27-35
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    • 2016
  • A Low jitter dual output frequency synthesizer for smart audio devices is described in this paper. It has been fabricated in a 1.8 V Dongbu $0.18-{\mu}m$ CMOS process. Output frequency is controlled by 3 rd order Sigma-Delta Modulation and digital divider. The frequency synthesizer has a size of $0.6mm^2$, frequency range of 0.6-200 MHz, loop bandwidth of 350 kHz, and rms jitter of 11.4 ps-21.6 ps.

A Ultra-wide Band Half-wavelength Loop Antenna using Self-complementary Principle for UAV Applications (자기상보 원리를 이용한 UAV 탑재용 초광대역 반파장 루프 안테나)

  • Yoon, Myung-Han;Kim, Jun-Won;Woo, Jong-Myung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.2
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    • pp.213-219
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    • 2015
  • In this paper, we present a low-profile ultra-wide band half-wavelength loop antenna for UAV (Unmanned Aerial Vehicle) applications. The proposed antenna has an ultra-wide band using self-complementary principle. Also, the ground was located between radiators for reducing height of the antenna using image theory. Dimensions of proposed antenna have $0.20{\lambda}_L{\times}0.14{\lambda}_L{\times}0.16{\lambda}_L$ (${\lambda}_L$ is the free-space wavelength at lowest frequency). Measured -10 dB bandwidth was ultra-wide band as more than 50 : 1(over 0.3 GHz ~15 GHz). The radiation patterns of the antenna was omnidirectional like monopole antennas. Moreover, we tried the antenna mounted on under a fuselage of a scaled UAV. As a result, the proposed antenna on the UAV maintained ultra-wide band and omnidirectional radiation patterns at all frequencies.

Magnetic Field Measuring System by using Loop-type Sensor (루우프형 센서를 이용한 자장측정계)

  • Lee, Bok-Hee;Kil, Gyung-Suk;Park, Dong-Hwa
    • Journal of Sensor Science and Technology
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    • v.4 no.2
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    • pp.14-21
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    • 1995
  • This paper deals with the active magnetic field measuring system which can measure the time-varying magnetic fields generated by power installations and lightning discharges. The magnetic field measuring system consists of the loop-type magnetic field sensor and the active integrator operated by a differential amplifier. The theoretical principle and design rule of the time-varying magnetic field measuring device and the calibration apparatus are introduced. From the calibration experiments, the frequency bandwidth of the full measuring system ranges from 270 Hz to about 2.3 MHz and the response sensitivity for magentic field strength is 128 $mV/{\mu}T$, respectively, and the calculated B-field values in the center of the loop-type sensor versus the the applied current made with a region of ${\pm}3\;%$error. The actual survey experiments by using lightning impulse current and oscillating impulse current were performed, the results of comparision between the input current waveforms and the magnetic field waveforms are a good agreement with each others and their deviations are less than 0.5 %.

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On-Glass Vehicle Antennas Using a Multi-Loop Structure (다중 루프 형태의 차량용 글래스 안테나)

  • Ahn, Seung-Beom;Kay, Young-Chul;Choo, Ho-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.3
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    • pp.230-239
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    • 2009
  • In this paper, we propose a novel on-glass antenna for FM radio reception in a recreation vehicle(RV). We use a multi-loop structure that takes advantage of a broad matching bandwidth and a high vertical radiation gain by efficiently utilizing a given space of a quarter glass in spite of the simple planar structure. Transparency of the antenna is also improved by adjusting the stripline widths based on the induced current distributions. The proposed antenna is printed on a quarter glass of a commercial vehicle and antenna performances such as the return loss and the gain are measured in a semi-anechoic chamber. The result shows the average gain of -9.67 dBi along the bore-sight direction($\theta=90^{\circ}$, $\phi=270^{\circ}$) in the FM radio band(80$\sim$l10 MHz), which is higher than a commercial monopole typed on-glass antenna($G_{ave}$=-12.49 dBi) and micro-antenna($G_{ave}$=-19.24 dBi) mounted on the roof of the RV.

A User Driven Adaptive Bandwidth Video Streaming System (사용자 기반 가변 대역폭 영상 스트리밍 시스템)

  • Chung, Yeongjee;Ozturk, Yusuf
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.4
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    • pp.825-840
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    • 2015
  • Adaptive bitrate (ABR) streaming technology has become an important and prevalent feature in many multimedia delivery systems, with content providers such as Netflix and Amazon using ABR streaming to increase bandwidth efficiency and provide the maximum user experience when channel conditions are not ideal. Where such systems could see improvement is in the delivery of live video with a closed loop cognitive control of video encoding. In this paper, we present streaming camera system which provides spatially and temporally adaptive video streams, learning the user's preferences in order to make intelligent scaling decisions. The system employs a hardware based H.264/AVC encoder for video compression. The encoding parameters can be configured by the user or by the cognitive system on behalf of the user when the bandwidth changes. A cognitive video client developed in this study learns the user's preferences(i.e. video size over frame rate) over time and intelligently adapts encoding parameters when the channel conditions change. It has been demonstrated that the cognitive decision system developed has the ability to control video bandwidth by altering the spatial and temporal resolution, as well as the ability to make scaling decisions.

Synchronization performance optimization using adaptive bandwidth filter and average power controller over DTV system (DTV시스템에서 평균 파워 조절기와 추정 옵셋 변화율에 따른 대역폭 조절 필터를 이용한 동기 성능 최적화)

  • Nam, Wan-Ju;Lee, Sung-Jun;Sohn, Sung-Hwan;Kim, Jae-Moung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.5
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    • pp.45-53
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    • 2007
  • To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.