• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 추계학술대회 논문집 전력기술부문
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• pp.12-14
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• 2007

A voltage transformer (VT) is used to transform a high voltage into a low voltage as an input for a metering device or a protection relay. VTs use an iron core which maximizes the flux linkage. The primary current of the VT has non-fundamental components caused by the hysteresis characteristics of the iron core. It causes a voltage drop in the winding impedances resulting in the error of the VT. This paper describes a compensation algorithm for the VT. The proposed algorithm can compensate the secondary voltage of VT by calculating the primary current from the exciting current of the hysteresis loop in the voltage transformer. In this paper, the exciting branch was divided into a non-linear core loss resistor and a non-linear magnetizing inductor. The performance of the proposed algorithm was validated under various conditions using EMTP generated data. Test results show that the proposed compensation algorithm can improve the accuracy of the VT significantly.

• 대한전자공학회논문지SD
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• 제44권7호통권361호
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• pp.37-44
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• 2007

GSM 셀룰러폰을 위한 저전압 고선형 바이폴라 OTA와 이룡 이용한 IF bandpass filter(BPF)를 제안하였다. OTA는 저전압 선형 transconductor, translinear 전류이득 셀, 그리고 3개의 전류 미러로 구성 되어있다. BPF는 2개의 동일한 2차 BPF를 직렬 연결한 형태인데, 2차 BPF는 저항과 커패시터 그리고 2개의 OTA와 커패시터로 된 ground simulated inductor로 구성되어 있다. 8GHz bipolar transistor-array를 사용한 SPICE 시뮬레이션에서는 1mS의 transconductance의 OTA가 ${\pm}2%$ 이하의 선형 오차와 ${\pm}2\;V$에서 ${\pm}0.65\;V$이상의 선형범위를 가짐을 보여준다. transconductor의 온도계수는 $-90ppm/^{\circ}C$이하이다. BPF는 중심 주파수는 $85MHz\;Q$값은 80이 되도록 설계하였다. 중심주파수에서의 온도계수는 $-182ppm/^{\circ}C$이고, BPF의 소비전력은 128mW 이다.

• 한국정보통신학회논문지
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• 제9권2호
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• pp.301-306
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• 2005

본 논문에서는 gain-boosting 회로를 이용하여 전류 미스매치를 줄일 수 있는 전하펌프와 전압제어 저항기를 사용하여 선형성이 우수한 래치 구조의 전압제어발생기를 제안하여 위상고정루프를 설계하였다. Cain-boosting 전하펌프를 사용한 위상고정루프는 루프필터 출력 전압 구간에서 11$mu$V(최대 43$mu$V, 최소 32$mu$V)의 전압 흔들림 차이를 나타내었다. 전압제어저항기를 이용한 전압제어발진기는 입력전압 동작 구간에서 우수한 선형성을 나타내었다. 또한 제작된 전압제어발진기의 위상 잡음 특성은 -1084Bc/Hz(a)100kHz이며 CMOS 공정으로 만들어진 LC 전압제어발진기와 비슷한 성능을 가진다. 0.35$mu$m CMOS 공정으로 시뮬레이션 하였으며 록킹 시간은 150$mu$s이다.

• 전자공학회논문지B
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• 제33B권2호
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• pp.131-139
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• 1996

This paper describes the chaotic neuron model to represent the complicated states of brain and analyzes the dynamical responses of chaotic neuron such as periodic, bifurcation, and chaotic phenomena which are simulated iwth numerical analysis. Next, the chaotic neuron circuit is implemented w ith the analog electronic devices. The transfer function of chaotic neuron is given by summed the linear and nonlinear property. The output function of chaojtic neuron is designed iwth the two cMOS inverters and a feedback resistor. By adjusting the external voltage, the various dynamical properties are demonstrated. In addition, we construt the chaotic neural networks which are composed of the interconnection of chaotic neuroncircuit such as serial, paralle, and layer connection. On the board experiment, we proved the dynamci and chaotic responses which exist in the human brain.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1506-1508
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• 2001

We have investigated for the modeling and the simulation of the ferroelectric capacitor and MFS TFT (Metal-Ferroelectric-Semiconductor Thin Film transistor). For ferroelectric capacitor modeling, we adopted the equivalent circuit model which consists of a nonlear capacitor, a nonliner resistor, and a linear capacitor. MFS TFT have been modeled by combining the ferroelectric capacitor and Bsim3 MOSFET model. Our simulations show the characteristics of ferroelectric capacitor and MFS TFT.

• 한국세라믹학회지
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• 제30권9호
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• pp.761-767
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• 1993

Electrical and mechanical properties of Pb(Mg, Te, Mn, Nb)O3-PZT ceramics are investigated as a function of CeO2 addition (0 to 0.3wt%), and the output characteristics of piezoelectric transformer are also presented. The grain size decreased and the shapes of particles were more uniform with the addition of CeO2. The coercive electric field(9500V/cm), mechanical quality factor (2500) and bend strength (1065kg/$\textrm{cm}^2$) were improved by addition of CeO2 0.2wt%. After repetition of a number of stress cycles, the degradation of k33 was not found in this sample. The voltage step-up ratio (Vdc/Vrms) of piezoelectric ceramic transformer (half wavevoltage doubler, load resistor 100M.ohm) was about 950 in a linear region, its value was relatively higher than other materials.

• 대한전자공학회논문지
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• 제15권4호
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• pp.33-37
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• 1978

전압제어형이나 전류제어형부성저항으로 사용될 수 있는 호용성이 있는 광결합부성저항회로가 설계되었다. 이 호용성은 트런지스터의 교환 및 회로내의 한 접속점을 변경시킴으로 이루어진다. 이러한 부성저항회로의 부성저항특성은 매우 선형적이며 부성저항값 및 I-V특성은 수동소자값의 변화로 넓은 범위에 걸쳐 변화된다.

• 전자공학회논문지A
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• 제32A권12호
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• pp.209-219
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• 1995

As a new algorithm for RC tree delay estimation, we propose a $\tau$-model of the driver and a moment propagation method. The $\tau$-model represents the driver as a Thevenin equivalent circuit which has a one-time-constant voltage source and a linear resistor. The new driver model estimates the input voltage waveform applied to the RC more accurately than the k-factor model or the 2-piece waveform model. Compared with Elmore method, which is a lst-order approximation, the moment propagation method, which uses $\pi$-model loads to calculate the moments of the voltage waveform on each node of RC trees, gives more accurate results by performing higher-order approximations with the same simple tree walking algorithm. In addition, for the instability problem which is common to all the approximation methods using the moment matching technique, we propose a heuristic method which guarantees a stable and accureate 2nd order approximation. The proposed driver model and the moment propagation method give an accureacy close to SPICE results and more than 1000 times speedup over circuit level simulations for RC trees and FPGA interconnects in which the interconnect delay is dominant.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.313-316
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• 2002

A SRM inverter has very low switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the intanteneous peak current for the stable operation In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the intanteneous peak current which occurs in transient state.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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• pp.1062-1064
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• 2005

3 phase 4-wire system has been widely used in the customer's application due to merit of 1 bank construction of loads such as 1-phase lighting, heat and 3-phase motor. But if the load distribution is not uniformed by the operation conditions, voltage unbalance is highly appeared by the difference of each phase current value. Especially, if the linear load such as resistance or inductive load has different power factor value, voltage unbalance factor is not the same due to the phase angle and magnitude of each phase voltage. In this paper, we composed the measurement device and analyzed by varying of load pattern.