• ETRI Journal
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• 제27권1호
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• pp.118-121
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• 2005

Silicon dioxide ($SiO_2$) films prepared by plasma-enhanced atomic-layer deposition were successfully grown at temperatures of $100\;to\;250^{\circ}C$, showing self-limiting characteristics. The growth rate decreases with an increasing deposition temperature. The relative dielectric constants of $SiO_2$ films are ranged from 4.5 to 7.7 with the decrease of growth temperature. A $SiO_2$ film grown at $250^{\circ}C$ exhibits a much lower leakage current than that grown at $100^{\circ}C$ due to its high film density and the fact that it contains deeper electron traps.

• 한국초전도ㆍ저온공학회논문지
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• 제18권2호
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• pp.5-7
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• 2016

We present an experimental investigation of the superconducting transition temperatures, $T_c$, of superconductor/ferromagnet bilayers with varying the thickness of ferromagnetic layer. FeN was used for the ferromagnetic (F) layer, and NbN and Nb were used for the superconducting (S) layer. The results were obtained using three different-thickness series of the S layer of the S/F bilayers: NbN/FeN with NbN thickness, $d_{NbN}{\approx}9.3nm$ and $d_{NbN}{\approx}10nm$, and Nb/FeN with Nb thickness $d_{Nb}{\approx}15nm$. $T_c$ drops sharply with increasing thickness of the ferromagnetic layer, $d_{FeN}$, before maximal suppression of superconductivity at $d_{FeN}{\approx}6.3nm$ for $d_{NbN}{\approx}10nm$ and at $d_{FeN}{\approx}2.5nm$ for $d_{Nb}{\approx}15nm$, respectively. After shallow minimum of $T_c$, a weak $T_c$ oscillation was observed in NbN/FeN bilayers, but it was hardly observable in Nb/FeN bilayers.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2013년도 춘계학술대회 논문집
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• pp.112-113
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• 2013

Thin CrAlMgSiN films, whose composition were 30.6Cr-11.1Al-7.3Mg-1.2Si-49.8N (at.%), were deposited on steel substrates in a cathodic arc plasma deposition system. They consisted of alternating crystalline Cr-N and AlMgSiN nanolayers. After oxidation at $800^{\circ}C$ for 200 h in air, a thin oxide layer formed by outward diffusion of Cr, Mg, Al, Fe, and N, and inward diffusion of O ions. Silicon ions were relatively immobile at $800^{\circ}C$. After oxidation at $900^{\circ}C$ for 10 h in air, a thin $Cr_2O_3$ layer containing dissolved ions of Al, Mg, Si, and Fe formed. Silicon ions became mobile at $900^{\circ}C$. After oxidation at $900^{\circ}C$ for 50 h in air, a thin $SiO_2-rich$ layer formed underneath the thin $Cr_2O_3$ layer. The film displayed good oxidation resistance. The main factor that decreased the oxidation resistance of the film was the outward diffusion and subsequent oxidation of Fe at the sample surface, particularly along the coated sample edge.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전기물성,응용부문
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• pp.183-186
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• 2004

The metal-ferroelectric-insulator-semiconductor(MFIS) capacitors were fabricated using a metalorganic decomposition (MOD)method. The $CeO_2$ thin films were deposited as a buffer layer on Si substrate and $Bi_{3.25}La_{0.75}Ti_3O_{12}$ (BLT) thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated by varying the $CeO_2$ layer thickness. The width of the memory window in the capacitance-voltage (C-V)curves for the MFIS structure decreased with increasing thickness of the $CeO_2$ layer. Auger electron spectroscopy (AES) and transmission electron microscopy (TEM) show no interdiffusion by using the $CeO_2$ film as buffer layer between the BLT film and Si substrate. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory field-effect-transistors (FETs) with large memory window.

• 대한금속재료학회지
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• 제46권11호
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• 연구논문집
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• 통권34호
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• pp.139-146
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• 2004

In this study, effect of temperature and time on melt-out of 25wt% Al-alloyed ductile iron has been investigated. The oxidation tests were carried out in a tube furnace at $800^\circC$, $930^\circC$, and $1000^\circC$ for lh, 5h, 10h, 50h. The microstructure, microhardness, and $Al_2O_3$ layer of oxidation-treated 25wt% Al-alloyed ductile iron samples (10 x 10 x 10 mm) were investigated. Phase identification was performed by X-ray diffraction(XRD) and EDS. The oxidation-treated 25wt% Al-alloyed ductile iron samples at $930^\circC$ for lh, 5h, 10h and KS GCD 500 were used for melt-out test in an Al alloy melt. The melt-out test results showed that oxidation tested sample at $930^\circC$ for 5h which on the whole forms $2-3\mum$ $Al_2O_3$ layer showed lowest melt-out depth. It was observed showed that appropriate Al203 layer can affect melt-out behaviors.

• Current Photovoltaic Research
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• 제6권1호
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• pp.21-26
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• 2018

Beside several advantages, the PV power generation as a clean energy source, is still below the supply level due to high power generation cost. Therefore, the interest in fabricating low-cost thin film solar cells is increasing continuously. $Cu_2O$, a low cost photovoltaic material, has a wide direct band gap of ~2.1 eV has along with the high theoretical energy conversion efficiency of about 20%. On the other hand, it has other benefits such as earth-abundance, low cost, non-toxic, high carrier mobility ($100cm^2/Vs$). In spite of these various advantages, the efficiency of $Cu_2O$ based solar cells is still significantly lower than the theoretical limit as reported in several literatures. One of the reasons behind the low efficiency of $Cu_2O$ solar cells can be the formation of CuO layer due to atmospheric surface oxidation of $Cu_2O$ absorber layer. In this work, atomic layer deposition method was used to remove the CuO layer that formed on $Cu_2O$ surface. First, $Cu_2O$ absorber layer was deposited by electrodeposition. On top of it buffer (ZnO) and TCO (AZO) layers were deposited by atomic layer deposition and rf-magnetron sputtering respectively. We fabricated the cells with a change in the deposition temperature of buffer layer ranging between $80^{\circ}C$ to $140^{\circ}C$. Finally, we compared the performance of fabricated solar cells, and studied the influence of buffer layer deposition temperature on $Cu_2O$ based solar cells by J-V and XPS measurements.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2007년도 추계학술대회 논문집
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• pp.147-148
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• 2007

The compound, Ti3(Al,Si)C2, was synthesized by hot pressing a powder mixture of TiCX, Al and Si. Its oxidation at 900 and 1000 oC in air for up to 50 h resulted in the formation of rutile-TiO2, -Al2O3 and amorphous SiO2. During oxidation, Ti diffused outwards to form the outer TiO2 layer, and oxygen was transported inwards to form the inner mixed layer.

• 한국재료학회지
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• 제12권5호
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• pp.327-333
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• 2002

In order to obtain the oxidation layer for SiC MOS, the oxide layers by thermal oxidation process with dry and wet method were deposited and characterized. Deposition temperature for oxidation layer was $1100^{\circ}C$~130$0^{\circ}C$ by $O_2$ and Ar atmosphere. The oxide thickness, surface morphology, and interface characteristic of deposited oxide layers were measurement by ellipsometer, SEM, TEM, AFM, and SIMS. Thickness of oxidation layer was confirmed 50nm and 90nm to with deposition temperature at $1150^{\circ}C$ and $1200{\circ}C$ for dry 4 hours and wet 1 hour, respectively. For the high purity oxidation layer, the necessity of sacrificial oxidation which is etched for the removal of the defeats on the wafer after quickly thermal oxidation was confirmed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.535-536
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• 2005

Organic photovoltaic effects were studied in a device structure of ITO/CuPc/Al and ITO/CuPc/$C_{60}$/BCP/Al. A thickness of CuPc layer was varied from 10 nm to 50 nm, we have obtained that the optimum CuPc layer thickness is around 40 nm from the analysis of the current density-voltage characteristics in CuPc single layer photovoltaic cell. From the thickness-dependent photovoltaic effects in CuPc/$C_{60}$ heterojunction devices, higher power conversion efficiency was obtained in ITO/20nm CuPc/40nm $C_{60}$/Al, which has a thickness ratio (CuPc:$C_{60}$) of 1:2 rather than 1:1 or 1:3. Light intensity on the device was measured by calibrated Si-photodiode and radiometer/photometer of International Light Inc(IL14004).