• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
• /
• pp.299-301
• /
• 1995

This paper represents an overvoltage clamping circuit for three level inverters. With a proposed overvoltage clamping circuit, the problems that high voltage stresses and voltage unbalance between outer and inner switches occurs in high power and high voltage 3-level inverters are reduced.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
• /
• pp.302-305
• /
• 1995

An improved carrier PWM method for three phase voltage source inverters is proposed. The basic idea of the proposed method is deleting unnecessary 1/3 of switchings in the saw tooth carrier PWM method. The lowest frequency of the remained harmonics of this method (when the modulation index is large) is about 50% higher and the maximum modulated voltage is about 15% higher than those of the triangular carrier PWM method. This method will be useful especially in the linear feedback current control and MOSFET inverters.

• 한국철도학회:학술대회논문집
• /
• 한국철도학회 1998년도 창립기념 춘계학술대회 논문집
• /
• pp.442-449
• /
• 1998

Since it is essential for traction motors to reduce size and weight to achieve given traction effort, they need high input voltage. But the lack of input voltage occurs periodically due to the characteristics of train system. Therefore traction inverters use over-modulation PWM to maximize inverter's voltage gain. On the other hand, IGBT inverters can use higher frequency twice than GTO ones, which resulted in the need for novel optimal synchronous PWM strategy. This paper suggests that linearly-compensated overmodulation/optimal synchronous PWM strategy and also the simulation results of the method for a real traction motor-intertia model are presented.

• International Journal of Railway
• /
• 제1권3호
• /
• pp.94-98
• /
• 2008

Static inverters are essential devices onboard of rolling stock. State-of-the-art static inverters have an impact on both rail infrastructure and vehicle maintenance due to their new topology with new features. The paper describes two important aspects as examples of new features available in state-of-the-art static inverters: active input current control and the effects on the rail infrastructure as well as the detection of the state of charge and the state of health of batteries to simplify vehicle maintenance.

• 전기학회논문지
• /
• 제67권3호
• /
• pp.374-382
• /
• 2018

This paper has done a hardware-based approach to increase the modulation index in 3-phase inverters, unlike the conventional software algorithm-based approaches. The minimum required time to measure the currents in a three-phase inverters with shunt resistors has also been analyzed. By the analysis, the longest time in minimum required time is AD conversion time. To shorten the minimum required time, this paper proposed a sample-and-hold(S/H) circuit implemented at the inverter current signal output to retain the current signal. When the linear operation region of an inverter with S/H was compared with that without it, the modulation index was increased by 7.8 %. Inverters with S/H circuits can employ the traditional software algorithms, such as the voltage injection method or current restoration method, and it will yield further increase the modulation index.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2016년도 전력전자학술대회 논문집
• /
• pp.95-96
• /
• 2016

This paper presents a voltage and frequency droop control for accurate power sharing of parallel distributed generation (DG) inverters in low voltage microgrid. In practice, line impedances between inverters and the point of common coupling of a microgrid are not always equal. This inequality in line impedances often results in reactive power sharing mismatch among inverters. To address this problem, intensive researches have been conducting. Although these methods can solve the unbalanced reactive power sharing, there are still problems remain unresolved, such as complicated structure or circulating current. To overcome such problems, a new droop control scheme is proposed, which not only guarantees accurate reactive power sharing but also has simple structure so that it can be easily implemented in existing systems without any hardware modification. The simulation is performed using Matlab/Simulinks to validate the proposed scheme.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1994년도 하계학술대회 논문집 A
• /
• pp.429-431
• /
• 1994

A parallel resonant dc link inverter, one of the many resonant inverters, has some superior characteristics in camparision with other resonant inverters. But loss of the resonant oscillation and occurrence of high peak voltage in the resonant capacitor of these inverters are serious problems. In this paper, we investigate a control method for resonant dc link inverters which can overcome these problems. Experimental results are presented to show superior operation of the resonant dc link inverter using the proposed control method.

• Journal of Power Electronics
• /
• 제14권2호
• /
• pp.383-391
• /
• 2014

For the digital control of systems such as grid-connected inverters, measuring inverter output currents accurately is essential. However, current measurement offsets are inevitably generated by current measurement paths and cause DC current components in real inverter output currents. Real inverter output currents with DC components cause the DC-link capacitor voltage to oscillate at the frequency of a utility voltage. For these reasons, current measurement offsets deteriorate the overall system performance. A compensation strategy to eliminate the effect of current measurement offsets in grid-connected inverters is proposed in this study. The validity of the proposed compensation strategy is verified through simulations and experiments. Results show that the proposed compensation strategy improves the performance of grid-connected inverters.

• Journal of Power Electronics
• /
• 제15권6호
• /
• pp.1517-1523
• /
• 2015

The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

• 전력전자학회논문지
• /
• 제19권2호
• /
• pp.173-183
• /
• 2014

In this paper, an analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters is presented, in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. In the inverter operation, the conduction loss depends on the modulation index (MI) and power factor (PF), whereas the switching loss depends on the switching frequency. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. In the case of lower MI, the NPC-type is more efficient than the T-type, and vice versa. The validity of the power loss analysis has been verified by the simulation results.