• Proceedings of the KIEE Conference
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• 2004.10a
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• pp.153-156
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• 2004

This paper presents a new circuit topology of the half-bridge resonant inverter. As the proposed half-bridge inverter can be operated in the load freewheeling modes, pulse width modulation (PWM) control method can be used for the output power control. The proposed half-bridge inverter should keep unity output displacement factor under the load-impedance varying conditions, if a new PWM control scheme based on the resonant frequency tracking algorithm is adopted. In this paper, electrical characteristics, and losses analysis of the proposed half-bridge resonant inverter are described. Simulation and experimental results of the prototype experimental setup to verify the validity of the proposed half-bridge resonant inverter are presented and discussed.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1610-1620
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• 2015

A major problem in conventional multilevel inverter is that an increase in power semiconductor switches causes an increase in cost and switching losses of the inverter. The multicarrier strategy adopted for the multilevel inverters has become more popular due to reduced cost, lower harmonic distortion, and higher voltage capability than the conventional switching strategy applied to inverters. Various topologies and modulation strategies have been reported for utility and drive applications. Level shifted based pulse width modulation techniques are proposed to investigate the performance of the multilevel inverter. The proposed work focuses on reducing the utilized switches so that the cost and the switching losses of the inverter do not go up and the consistent efficiency could be achieved. This paper presents the detailed analysis of these topologies. The analysis is based on the number of switches, DC sources, output level, maximum voltage, and the efficiency. As an illustration, single phase cascaded multilevel inverter topologies are simulated using MATLAB/SIMULINK and the experimental results demonstrate the viability of these inverters.

• Journal of Power Electronics
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• v.18 no.2
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• pp.418-431
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• 2018

This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.

• Journal of Power Electronics
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• v.13 no.5
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• pp.787-797
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• 2013

Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.12
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• pp.2359-2369
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• 2009

The study on the multi-level inverter has been increasingly progressing to reduce the switching loss and improve the THD of output current in photovoltaic inverter. Recently, the main topics of multi-level inverter are to reduce the number of devices maintaining the power quality. Therefore, the novel topology was proposed for these problem which is composed of the isolated H-bridge multi-level inverter using the three phase low frequency transformer. The proposed multi-level inverter may not be need for a independent DC power, diode and capacitor. Specially, It has a advantage in generating high voltage source. The proposed approach is verified through simulation and experiment.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1203-1210
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• 2017

Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

• Journal of Power Electronics
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• v.16 no.1
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• pp.133-141
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• 2016

This paper focuses on the development of a Five-Level Flying-Capacitor Dual Buck Inverter (FLFCDBI) based on the main circuit of dual buck inverters. This topology has been described as not having any shoot-through problems, no body-diode reverse recovery problems and the half-cycle work mode found in the traditional Multi-Level Flying-Capacitor Inverter (MLFCI). It has been shown that the flying-capacitor voltages of this inverter can be regulated by the redundant state selection within one pole. The voltage balance of the flying-capacitors can be achieved by charging or discharging in the positive (negative) half cycles by choosing the proper logical algorithms. This system has a simple structure but demonstrates improved performance and reliability. The validity of this inverter is conformed through computer-aided simulation and experimental investigations.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.134-139
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• 2005

This paper presents a cost effective quasi-resonant soft-switching PWM high frequency inverter with minimum circuit components. This inverter can achieve wider soft commutation, simpler power circuit configuration, smaller volumetric size, lower cost and wider power regulation range, higher-efficiency as compared with single ended quasi-resonant ZVS-PFM inverter and active voltage clamped quasi-resonant ZVS-PWM inverter. The operation principle of the proposed inverter is described on the basis of the simulation and experimental results, together with its operating performances in steady state. The operating performances of this unique proposed high frequency inverter based on ZVS and ZCS arms-related soft commutation principle is evaluated and discussed as compared with the active voltage-clamped ZVS-PWM inverter and a conventional single-ended ZVS-PFM inverter. The practical effectiveness of a novel type quasi-resonant soft-switching PWM high frequency inverter using IGBT is actually proved for consumer induction heated appliances as rice cooker, hot water producer, steamer and super heated steamer. The extended bidirectional circuit topology of quasi-resonant PWM high frequency inverter with minimum circuit components is demonstrated, which operate as the direct frequency changer.

• Proceedings of the KIPE Conference
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• 2013.11a
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• pp.105-106
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• 2013

This paper proposes a new topology with active switched-capacitor and switched-inductor impedance network, which can obtain a high boost factor with small shoot-through time. The proposed topology uses an active switched capacitor and switched-inductor impedance network in order to couple the main circuit and input dc source for boosting the output voltage. The proposed topology contains all advantages of the classical Z-source inverter. Comparing with other topologies, the proposed topology uses lesser component and the voltage boost inversion ability significantly increases. The theoretical analysis, pulse width modulation control strategies, and a comparison with classical ZSI have been given in this paper. Both simulation and experimental results will be presented to verify the advantages of the proposed topology.