• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.7C
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• pp.644-651
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• 2007

In multiple antenna systems, vertical Bell Labs Layered Space-Time (V-BLAST) systems enable very high throughput by nulling and cancelling at each layer detection. In this paper, we propose a V-BLAST system which combines with signal space diversity technique. The benefit of the signal space diversity is that we can obtain an additional gain without extra bandwidth and power expansion by applying inphase/quadrature interleaving and the constellation rotation. Through simulation results, it is shown that the performance of the proposed system is less than 0.5dB away from the ideal upper bound.

• Journal of electromagnetic engineering and science
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• v.6 no.3
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• pp.147-154
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• 2006

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de) interleaving and iterative decoding in a conventional maximum a posteriori(MAP) turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is come from the combination of the radix-4, dual-path processing, parallel decoding, and rearly-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit-error rate(BER) performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. Fixed on the parameters of N=212, iteration=3, 8-states, 3 iterations, and QPSK modulation scheme, we designed the adaptive high-speed turbo decoder using the Xilinx chip (VIRTEX2P (XC2VP30-5FG676)) with the speed of 17.78 Mb/s. From the results, we confirmed that the decoding speed of the proposed decoder is faster than conventional algorithms by 8 times.

• Annual Conference on Human and Language Technology
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• 1999.10e
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• pp.13-19
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• 1999

본 논문은 분산, 독립적인 다수의 문서 컬렉션으로부터의 검색결과를 병합하는 컬렉션 융합(collection fusion)문제에 대한 효과적인 랭킹방법을 제시한다. 일반적인 컬렉션 융합 문제란 분산되어 있는 다수의 문서 컬렉션에서 독립적이고 능동적인 검색기들의 검색결과를 효과적으로 랭킹(ranking) 병합하는 것인데, 각기 다른 특성을 가진 다수의 컬렉션을 동일한 검색기를 통하여 검색된 결과를 병합하는 환경과 서로 다른 알고리즘을 갖는 검색기를 통한 검색 결과 병합 환경으로 나누어 질 수 있다. 본 논문에서는 서로 다른 특성을 갖는 다수의 컬렉션을 서로 다른 알고리즘을 갖는 검색기들을 통하여 검색한 결과를 병합하는 방법을 제시한다. 각 컬렉션에 학습 질를 넣어 얻은 정보를 토대로, 실제 질의를 넣었을 때 각각의 컬렉션에서 나온 결과가 통합 결과 집합에서 차지하는 비율과 각 문서의 순위를 결정한다. 기존 연구에서 사용한 방법들은 랜덤성에 의존한 비결정적인 랭킹 방법을 제시하거나, 단순하게 검색결과 집합의 문서 수를 바탕으로 인터리빙(interleaving)하는 방법을 제시하였다. 본 논문에서는 학습 질의에서 나온 정보를 기반으로 결정적이면서도 보다 효과적인 랭킹 방법을 제시한다.

• ETRI Journal
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• v.31 no.6
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• pp.795-802
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• 2009

This paper presents the design of an advanced terrestrial digital multimedia broadcasting (AT-DMB) baseband receiver SoC. The AT-DMB baseband is incorporated into a hierarchical modulation scheme consisting of high priority (HP) and low priority (LP) stream decoders. The advantages of the hierarchical modulation scheme are backward compatibility and an enhanced data rate. The structure of the HP stream is the same as that of the conventional T-DMB system; therefore, a conventional T-DMB service is possible by decoding multimedia data in an HP stream. An enhanced data rate can be achieved by using both HP and LP streams. In this paper, we also discuss a time deinterleaver that can deinterleave data for a time duration of 384 ms or 768 ms. The interleaving time duration is chosen using the LP symbol mapping scheme. Furthermore, instead of a Viterbi decoder, a turbo decoder is adopted as an inner error correction system to mitigate the performance degradation due to a smaller symbol distance in a hierarchically modulated LP symbol. The AT-DMB baseband receiver SoC is fabricated using 0.13 ${\mu}m$ technology and shows successful operation with a 50 mW power dissipation.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.198-200
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• 2018

In this paper a single-stage single-phase differential type isolated AC-DC converter is proposed. This converter eliminates the requirement to use bulky electrolytic capacitor from the system and at the same time provides DC charging by employing the AC Power Decoupling waveform control method. All the switches of the converter achieve ZVS turn on during half line cycle and all diodes achieve ZCS turn off during entire line cycle. A conventional controller is implemented for PFC control and output regulation, whereas a power decoupling controller is added to compensate $2^{nd}$ harmonic ripple power. In addition, an interleaving technique is applied to increase the power range of the converter and reduce the input inductor size. In the end simulation verification is performed and results are obtained for 6.6KW.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.5C
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• pp.485-497
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• 2009

In this paper, we described DVB-S2 system for mobility. cross layer coding technique are needed to maintain the performance in deep fading channel. Cross layer coding is divided into two kinds of level. First level is Physical layer coding and, second layer is link layer or upper layer coding. Fixed on DVB-S2 short frame coding method as a physical layer, we simulated the various coding method as an upper layer coding. Furthermore, we analyzed the performance of each coding method on according to mobile vehicle speed, data rate, interleaving memory size, and IP packet size.

• Journal of Communications and Networks
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• v.6 no.1
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• pp.1-8
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• 2004

In this paper, we investigate the properties and performance of space-time bit-interleaved coded modulation (STBICM) systems in fast Rayleigh fading channels. We first show that ST-BICM with QPSK signaling in fast fading channels possesses the uniform distance property, which makes performance analysis tractable. We also derive the probability distribution of the squared Euclidean distance between space-time symbols assuming uniform bit-interleaving. Based on the distribution, we show that the diversity order for each codeword pair becomes maximized as the frame length becomes sufficiently long. This maximum diversity order property implies that the bit-interleaver transforms an ST-BICM system over transmit diversity channels into an equivalent coded BPSK system over independent fading channels. We analyze the performance of ST-BICM in fast fading channels by deriving an FER upper bound. The derived bound turns out very accurate, requiring only the distance spectrum of the binary channel codes of ST-BICM. Numerical results demonstrate that the bound is tight enough to render an accurate estimate of performance of ST-BICM systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.5
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• pp.1135-1140
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• 2011

This paper proposes a DTMB deinterleaver structure to reduce the SDRAM power consumption with buffer conversion and the single pointer-register structure. The DTMB deinterleaver with deep interleaving for higher performance consists of long delay buffers allocated on SDRAM. The conventional structure activates a new SDRAM row almost everytime when it reads and writes a datum. In the proposed structure, long buffers are transformed into several short buffers so that the number of row activations is reduced. The single pointer-register structure solves the problem of many pointer-registers. The experimental results show that the SDRAM power consumption can be reduced to around 37% with slight logic area reduction.

• Journal of Power Electronics
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• v.10 no.6
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• pp.673-679
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• 2010

Input-series-output-parallel (ISOP) connected DC-DC converters enable low voltage rating switches to be used in high voltage input applications. In this paper, a DSP is adopted to generate digital phase-shifted PWM signals and to fulfill the closed-loop control function for ISOP connected two full-bridge DC-DC converters. Moreover, a stable output current sharing control strategy is proposed for the system, with which equal sharing of the input voltage and the load current can be achieved without any input voltage control loops. Based on small signal analysis with the state space average method, a loop gain design with the proposed scheme is made. Compared with the conventional IVS scheme, the proposed strategy leads to simplification of the output voltage regulator design and better static and dynamic responses. The effectiveness of the proposed control strategy is verified by the simulation and experimental results of an ISOP system made up of two full-bridge DC-DC converters.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.6 no.4
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• pp.3-38
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• 1996

The mobile station shall convolutionally encode the data transmitted on the reverse traffic channel and the access channel prior to interleaving. Code symbols output from the convolutional encoder are repeated before being interleaved except the 9600 bps data rate. All the symbols are then interleaved, 64-ary orthogonal modulation, direct-sequence spreading, quadrature spreading, baseband filtering and QPSK transmission. The sync, paging, and forward traffic channel except the pilot channel in the forward CDMA channel are convolutionally encoded, block interleaved, spread with Walsh function at a fixed chip rate of 1.2288 Mcps to provide orthogonal channelization among all code channels. Following the spreading operation, the I and Q impulses are applied to respective baseband filters. After that, these impulses shall be transmitted by QPSK. Authentication in the CDMA system is the process for confirming the identity of the mobile station by exchanging information between a mobile station and the base station. The authentication scheme is to generate a 18-bit hash code from the 152-bit message length appended with 24-bit or 40-bit padding. Several techniques are proposed for the authentication data computation in this paper. To protect sensitive subscriber information, it shall be required enciphering ceratin fields of selected traffic channel signaling messages. The message encryption can be accomplished in two ways, i.e., external encryption and internal encryption.