• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.3
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• pp.40-49
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• 1989

A variable-state block interference channel model is presented which matches asynchronous multiple-access slow frequency-hopped spread-spectrum systems which suffer from bursts of interference of variable duration. For variable-state block interference channels test pattern techniques combined with interleaving are presented from which the decoder obtain side information about channel states. By examining test patterns the decoder estimates which parts of data blocks are affected by interference and regards the parts of blocks affected by interference as erasures. Since the presence of test patterns reduces the number of bits for data transmission, test patterns are not useful for variable-state block interference channels for small hit probability, It is shown that test patterns increase the capacities of variable-state block interference channels for large hit probability. It is also shown that test patterns provide a almost full side information about channel states for certain values of parameters.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.42 no.3 s.303
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• pp.73-82
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• 2005

Recently, The wide range of the Internet applications and the related technology developments enabled the ease use of the digital multimedia contents (fixed images, movies, digital audios). However, due to the replay ability which the contents may be easily duplicated and not only the duplicates are capable of providing the same original quality. There are mainly the encipher techniques and the watermarking techniques which are studied and used as solutions for the above problem in order to protect the license holders' rights. To the protection of the IP(Intellectual Property) rights of the owner, digital watermarking is the technique that authenticates the legal copyrighter. This paper proposed the watermarking algorithms to watermark the 256 gray logo image and the color image by applying the wavelet transformation to the color stand-still images. The proposed algorithms conducted the watermark insertion at the LH frequency region among the wavelet transformation regions (LL, LH, HL, HH). The interleaving algorithms which applied in data communication was applied to the watermark. the amount of watermark increased which consequently caused the PSNR to decrease but this might provide the perseverance against the external attacks such as extraction, filtering, and crop.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.6
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• pp.611-619
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• 2016

Success in modern war depends on electronic warfare. Therefore, It is very important to identify the kind of Radar PRI modulations in a lot of Radar electromagnetic waves. In this paper, I propose an algorithm to identify Linear up Sliding PRI, Non-Linear up Sliding PRI and Linear Down Sliding PRI, Non-Linear Down Sliding PRI among many Radar pulses. We applied not only the TDOA(Time Difference Of Arrival) concept of Radar pulse signals incoming to antennas but also a rising and falling curve characteristics of those PRI's. After making a program by such algorithm, we input each 40 data to those PRI's identification programs and as a result, those programs fully processed the data in according to expectations. In the future, those programs can be applied to the ESM, ELINT system.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.10
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• pp.595-602
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• 2003

This Paper presents an efficient hybrid techniques for a standard cell placement. The prototype tool adopts a middle-down methodology in which an n${\times}$m grid is imposed over the layout area and cells are assigned to bins forming a global placement. The optimization technique applied in this phase is based on the Relaxation-Based Local Search (RBLS) framework [12］in which a combinatorial search mechanism is driven by an analytical engine. This enables a more global view of the problem and results in complex modifications of the placement in a single search“move.”Details of this approach including a novel placement legalization procedure are presented. When a global placement converges, a detailed placement is formed and further optimized by the optimal interleaving technique[13］. Experimental results on MCNC benchmarking circuits are presented and compared with the Feng Shui's results in［14］. Solution Qualifies are almost the same as the Feng Shui's results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.2
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• pp.279-285
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• 2011

The next generation wireless communication systems are required high BER performance better than present performance. Double binary Turbo code have error floor at high SNR, so it cannot be used in next generation wireless communication system. Therefore, many methods are proposed for overcome error floor at DVB-RCS NG(next generation). In this paper, we analysis structure of third-dimension Turbo code(3D-turbo code). 3D-Turbo code overcomes error flow by additive post-encoder in conventional DVB-RCS Turbo code. Performance of 3D-Turbo code is changed by post-encoder form, interleaving method, value of ${\lambda}$. So we are simulated by those parameter and proposed optimal form. By a result, performance of 3D-Turbo is better than conventional DVB-RCS Turbo code and it overcome error floor of conventional DVB-RCS Turbo code.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.2
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• pp.386-392
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• 2015

Data in a image compression codec are processed with a specific regular block size. The processing order of block sized data is changed in specific function blocks and the data is packed in memory and read by a new sequence. To maintain a regular throughput rate, double buffering is normally used that interleaving two block sized memory to do concurrent read and write operations. Single buffering using only one block sized memory can be adopted to the simple data reordering, but when a complicate reordering occurs, irregular address changes prohibit from implementing adequate address generating for single buffering. This paper shows that there is a predictable and recurring regularity of changing address access orders within a finite updating counts and suggests an effective method to implement. The data reordering function using suggested idea is designed with HDL and implemented with TSMC 0.18 CMOS process library. In various scan blocks, it shows more than 40% size reduction compared with a conventional method.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.463-471
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• 2021

Since 2016, National Institute of Standards and Technology (NIST) has been conducting a post quantum cryptography standardization project in preparation for a quantum computing environment. Three rounds are currently in progress, and most of the candidates (5/7) are lattice-based. Lattice-based post quantum cryptography is evaluated to be applicable even in an embedded environment where resources are limited by providing efficient operation processing and appropriate key length. Among them, SABER KEM provides the efficient modulus and Toom-Cook to process polynomial multiplication with computation-intensive tasks. In this paper, we present the optimized implementation of evaluation and interpolation in Toom-Cook algorithm of SABER utilizing ARM/NEON in ARMv8-A platform. In the evaluation process, we propose an efficient interleaving method of ARM/NEON, and in the interpolation process, we introduce an optimized implementation methodology applicable in various embedded environments. As a result, the proposed implementation achieved 3.5 times faster performance in the evaluation process and 5 times faster in the interpolation process than the previous reference implementation.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.8
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• pp.2068-2082
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• 2023

With the rapid development of deep learning, Depth Map Super-Resolution (DMSR) method has achieved more advanced performances. However, when the upsampling rate is very large, it is difficult to capture the structural consistency between color features and depth features by these DMSR methods. Therefore, we propose a color-image guided DMSR method based on iterative depth feature enhancement. Considering the feature difference between high-quality color features and low-quality depth features, we propose to decompose the depth features into High-Frequency (HF) and Low-Frequency (LF) components. Due to structural homogeneity of depth HF components and HF color features, only HF color features are used to enhance the depth HF features without using the LF color features. Before the HF and LF depth feature decomposition, the LF component of the previous depth decomposition and the updated HF component are combined together. After decomposing and reorganizing recursively-updated features, we combine all the depth LF features with the final updated depth HF features to obtain the enhanced-depth features. Next, the enhanced-depth features are input into the multistage depth map fusion reconstruction block, in which the cross enhancement module is introduced into the reconstruction block to fully mine the spatial correlation of depth map by interleaving various features between different convolution groups. Experimental results can show that the two objective assessments of root mean square error and mean absolute deviation of the proposed method are superior to those of many latest DMSR methods.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.51-57
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• 2015

In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

• Journal of the Mineralogical Society of Korea
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• v.15 no.3
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• pp.221-230
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• 2002

Weathering of biotite shows a biotite-vermiculite-kaolinite sequence at the early stage, but presents biotite-kaolinite sequence without a significant intermediate phase (vermiculite) at the late stage from the weathering profile of the granitic gneiss. Secondary 1:1 phyllosilicates are kaolinite and halloysite which show different weathering textures originated by a different formation mechanism. Kaolinitization began from the edges of biotite and propagated toward the interior of grain along a multilayered front. $10 \AA$ layers of biotite are interleaving with $7\AA$ layers of kaolinite and c-axis of two phases is consistent. Kaolinite pseudomorph of biotite is isovolumetric, compared to the biotite boundary and includes many band-like porosities parallel to the cleavage. Platy kaolinite formed by 1:1 layer fur layer replacement of biotite. Halloysitization proceeded outward from the grain edges which were foliated as fine flakes and bent at the right angle for cleavage Halloysites were extensively fanning out and greatly increased the volume of grain. This indicated that halloysite tubes were formed by epitaxial overgrowth on the surface of biotite with import of Si and Al from the external solution by dissolution of plagioclase. These halloysites have abnormally high Fe content ( ~11%).