• Title/Summary/Keyword: interfacial trap passivation

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Improved Dit between ALD HfAlO Dielectric and InGaAs Substrate Using NH3 Plasma Passivation (InGaAs 위의 NH3 Plasma Passivation을 이용한 ALD HfAlO유전체 계면전하(Dit) 향상)

  • Choi, Jae Sung
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.4
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    • pp.27-31
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    • 2018
  • The effect of $NH_3$ plasma passivation on the chemical and electrical characteristics of ALD HfAlO dielectric on the InGaAs substrate was investigated. The results show that $NH_3$ plasma passivation exhibit better electrical & chemical performance such as much lower leakage current, lower density of interface trap(Dit) level, and low unstable interfacial oxide. $NH_3$ plasma passivation can effectively enhance interfacial characteristics. Therefore $NH_3$ plasma passivation improved the HfAlO dielectric performance on the InGaAs substrate.

Influence of Trap Passivation by Hydrogen on the Electrical Properties of Polysilicon-Based MSM Photodetector

  • Lee, Jae-Sung
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.6
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    • pp.316-319
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    • 2017
  • A new approach to improving the electrical characteristics and optical response of a polysilicon-based metal-semiconductor-metal (MSM) photodetector is proposed. To understand the cause of current restriction in the MSM photodetector, modified trap mechanisms are suggested, which include interfacial electron traps at the metal/polysilicon interface and silicon dangling bonds between silicon crystallite grains. Those traps were passivated using hydrogen ion implantation with subsequent post-annealing. Photodetectors that were ion-implanted under optima conditions exhibited improved photoconductivity and reduced dark current instability, implying that the hydrogen bonds in the polysilicon influence the simultaneous decreases in the density of dangling bonds at grain boundaries and the trapped positive charges at the contact interface.

Effective Interfacial Trap Passivation with Organic Dye Molecule to Enhance Efficiency and Light Soaking Stability in Polymer Solar Cells

  • Rasool, Shafket;Zhou, Haoran;Vu, Doan Van;Haris, Muhammad;Song, Chang Eun;Kim, Hwan Kyu;Shin, Won Suk
    • Current Photovoltaic Research
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    • v.9 no.4
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    • pp.145-159
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    • 2021
  • Light soaking (LS) stability in polymer solar cells (PSCs) has always been a challenge to achieve due to unstable photoactive layer-electrode interface. Especially, the electron transport layer (ETL) and photoactive layer interface limits the LS stability of PSCs. Herein, we have modified the most commonly used and robust zinc oxide (ZnO) ETL-interface using an organic dye molecule and a co-adsorbent. Power conversion efficiencies have been slightly improved but when these PSCs were subjected to long term LS stability chamber, equipped with heat and humidity (45℃ and 85% relative humidity), an outstanding stability in the case of ZnO/dye+co-adsorbent ETL containing devices have been achieved. The enhanced LS stability occurred due to the suppressed interfacial defects and robust contact between the ZnO and photoactive layer. Current density as well as fill factors have been retained after LS with the modified ETL as compared to un-modified ETL, owing to their higher charge collection efficiencies which originated from higher electron mobilities. Moreover, the existence of less traps (as observed from light intensity-open circuit voltage measurements and dark currents at -2V) are also found to be one of the reasons for enhanced LS stability in the current study. We conclude that the mitigation ETL-surface traps using an organic dye with a co-adsorbent is an effective and robust approach to enhance the LS stability in PSCs.

Improvement of the carrier transport property and interfacial behavior in InGaAs quantum well Metal-Oxide-Semiconductor Field-Effect-Transistors with sulfur passivation (황화 암모늄을 이용한 Al2O3/HfO2 다층 게이트 절연막 트랜지스터 전기적 및 계면적 특성 향상 연구)

  • Kim, Jun-Gyu;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.29 no.4
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    • pp.266-269
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    • 2020
  • In this study, we investigated the effect of a sulfur passivation (S-passivation) process step on the electrical properties of surface-channel In0.7Ga0.3As quantum-well (QW) metal-oxide-semiconductor field-effect transistors (MOSFETs) with S/D regrowth contacts. We fabricated long-channel In0.7Ga0.3As QW MOSFETs with and without (NH4)2S treatment and then deposited 1/4 nm of Al2O3/HfO2 through atomic layer deposition. The devices with S-passivation exhibited lower values of subthreshold swing (74 mV/decade) and drain-induced barrier lowering (19 mV/V) than the devices without S-passivation. A conductance method was applied, and a low value of interface trap density Dit (2.83×1012 cm-2eV-1) was obtained for the devices with S-passivation. Based on these results, interface traps between InGaAs and high-κ are other defect sources that need to be considered in future studies to improve III-V microsensor sensing platforms.

The passivation of III-V compound semiconductor surface by laser CVD (Laser CVD법에 의한 III-V화합물 반도체 표면의 불활성화)

  • Lee, H.S.;Lee, K.S.;Cho, T.H.;Huh, Y.J.;Kim, S.J.;Sung, Y.K.
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.1274-1276
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    • 1993
  • The silicon-nitride films formed by laser CVD method are used for passivating GaAs surfaces. The electrical Properties of metal-insulator-GaAs structure are studied to determined the interfacial characteristics by C-V curves and deep level transient spectroscopy(DLTS). The SiN films are photolysisly deposited from $SiH_4\;and\;NH_3$ in the range of $100^{\circ}C-300^{\circ}C$ on P type, (100) GaAs. The hysteresis is reduced and interface trap density is lowered to $10^{12}-10^{13}$ at $100^{\circ}C-200^{\circ}C$. The surface leakage current is studied too. The passivated GaAs have a little leakage current compared to non passivated GaAs.

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Annealing temperature dependence on the positive bias stability of IGZO thin-film transistors

  • Shin, Hyun-Soo;Ahn, Byung-Du;Rim, You-Seung;Kim, Hyun-Jae
    • Journal of Information Display
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    • v.12 no.4
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    • pp.209-212
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    • 2011
  • The threshold voltage shift (${\Delta}V_{th}$) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at $700^{\circ}C$. The degradation of the saturation mobility (${\mu}_{sat}$) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at $700^{\circ}C$, it showed a smaller ${\Delta}V_{th}$ under PBS conditions for $10^4$ s than the samples that were annealed at $500^{\circ}C$, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at $600^{\circ}C$ showed the best performance and the smallest ${\Delta}V_{th}$ among the fabricated samples with a ${\mu}_{sat}$ of $9.38cm^2/V$ s, an S-factor of 0.46V/decade, and a ${\Delta}V_{th}$ of 0.009V, which is due to the passivation of the defects by high thermal annealing without structural change.