• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.53-57
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• 2002

Reduction of insulation thickness would be beneficial not only for increasing the cable length but would also improve its thermal performance. An interfacial diffusion method was devised to reduce insulation thickness by improving the interfacial properties of XLPE cable insulation. In this paper, to evaluate superficially the interface properties between XLPE insulation and semiconducting layer, the dielectric and insulation properties of tan${\delta}$ and volume resistance were measured with temperature dependence. Above the results, dielectirc and insulation properties with semiconductor/XLPE were more anormal than its bulk caused by the interfacial properties.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.2
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• pp.118-123
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• 2007

The purpose of this work was to investigate the design and fabrication process effects on electrical properties in high capacitance multilayer ceramic capacitor (MLCC) with nickel electrode. Dielectric breakdown voltage and insulation resistance value were decreased with increasing stack layer number, but dielectric constant and capacitance were increased. With increasing green sheet thickness, dielectric breakdown voltage, C-V and I-V properties were also increased. The major reasons of the effects were thought to be the defects generated extrinsically during fabrication process and interfacial reactions formed between nickel electrode and dielectric layer. These investigations clearly showed the influence of both green sheet thick ness and stack layer number on the electrical properties in fabricating the MLCC.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.252-254
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• 2002

Metal oxides with high dielectric constants have the potential to expend scaling of transistor gate capacitance beyond that of ultrathin silicon dioxide. However, during deposition of most metal oxides on silicon, an interfacial region of SiOx is formed and limits the specific capacitance of the gate structure. We deposisted aluminum oxide and examined the composition of the interfacial layer by employing high-resolution X-ray photoelectron spectroscopy and X-ray reflectivity. We find that the interfacial region is not pure SiO$_2$, but is composed of a complex depth-dependent ternary oxide of $AlSi_xO_y$ and the pure SiO$_2$.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.52-59
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• 2023

The effects of dielectric curing temperature and temperature/humidity treatment conditions on the interfacial adhesion energies between Ti diffusion barrier/polybenzoxazole (PBO) dielectric layers were systematically investigated for Cu redistribution layer applications of fan-out wafer level package. The initial interfacial adhesion energies were 16.63, 25.95, 16.58 J/m² for PBO curing temperatures at 175, 200, and 225 ℃, respectively. X-ray photoelectron spectroscopy analysis showed that there exists a good correlation between the interfacial adhesion energy and the C-O peak area fractions at PBO delaminated surfaces. And the interfacial adhesion energies of samples cured at 200 ℃ decreased to 3.99 J/m² after 500 h at 85 ℃/85 % relative humidity, possibly due to the weak boundary layer formation inside PBO near Ti/PBO interface.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.281-284
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• 1999

In this paper, the electrical conduction, breakdown strength and dielectric properties were investigated in the interfaces of PET films. The volume resistivity and breakdown strength were decreased; especially the specimens with semiconductive layer showed the lowest breakdown strength. This decrease of electrical properties was appeared by increasing charge density in inhomogeneous layer of PET. The dielectric properties of PET did not show significant difference with PET/PET but the films with semiconductive interface layer showed the increase in capacitance and $tan\delta$ was affected by the PET rather than semiconductive layer. It is assumed that the variation of $tan\delta$ was affected by the dielectric polarization and the leakage current(charge).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.10
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• pp.873-877
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• 2007

In order to apply a complex multilayer chip LC filter, this study has estimated the interfacial reaction and coupling properties of dielectric materials $Pb(Fe_{1/2}Nb_{1/2})O_3$ and Ni-Zn-Cu ferrite materials through low-temperature co-sintering (LTCS). PFN powders were fabricated using double calcinated at $700^{\circ}C$ and then $850^{\circ}C$. While the perovskite phase rate was found to be 91 %, after heat treatment at $900^{\circ}C$ for 6h, the perovskite phase rate and density exhibited a value of 100 % and 7.46$g/cm^3$, respectively. The PFN/Ni-Zn-Cu ferrite, PFN/CUO (or $Pb_2Fe_2O_5$) and ferrite/CuO (or $Pb_2Fe_2O_5$) were mechanically coupled through interfacial reactions after the specimen was co-sintered at $900^{\circ}C$ for 6 h. No intermediate layer exists for the mutual coupling reaction. This result indicates the possibility of low-temperature co-sintering without any interfacial reaction layer for a multilayer chip LC filter.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.938-940
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• 1998

In order to improve insulating character and ability of insulating system of power apparatus, the interfacial and complex structure is widely used. However, the interface or complex structure of insulation materials is reported as a weak point which causes breakdown. As the interface of insulation system degrades its electrical property and eventually causes a failure, the datailed phenomenon analysis is reported. The object of this paper is to evaluate dielectric property of PET film with the interface. The $tan{\delta}$ increased with the existence of semiconducting layer and showed prominent decrease as a function of temperature. Also, the $tan{\delta}$ showed prominent increase as a function of frequency. The dielectric properties of interfacial were affected by the interface characteristics.

• Bulletin of the Korean Chemical Society
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• v.23 no.5
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• pp.741-744
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• 2002

Single phase of multicomponent oxide ZrTiO4 film could be prepared through surface sol-gel route simply by coating the mixture of 100 mM zirconium butoxide and titanium butoxide on $Pt/Ti/SiO_2Si(100)$ substrate, following pyro lysis at $450^{\circ}C$, and annealing it at 770 $^{\circ}C.$ The dielectric constant of the film was reduced as the film thickness decreased due to of the interfacial effects caused by layer/electrode and a few voids inside the multilayer. However, the dielectric property was independent of applied dc bias sweeps voltage (-2 to +2 V).The dielectric constant of bulk film, 31.9, estimated using series-connected capacitor model was independent of film thickness and frequency in the measurement range, but theoretical interfacial thickness, ti, was dependent on the frequency. It reached a saturated ti value, $6.9{\AA}$, at high frequency by extraction of some capacitance component formed at low frequency range. The dielectric constant of bulk ZrTiO4 pellet-shaped material was 33.7 and very stable with frequency promising as good applicable devices.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.37-43
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• 2020

The effects of O₂ plasma pre-treatment and post-annealing conditions on the interfacial adhesion of Ti thin film and WPR dielectric were investigated using 90° peel test for fan-out wafer level packaging (FOWLP) redistribution layer (RDL) applications. Peel strength between Ti film and WPR dielectric decreased from 8.9±1.3 g/mm to 2.7±0.9 g/mm for variation of O₂ plasma pre-treatment time from 30s to 300s, which is closely related to C-O-C or C=O bonds breakage at the WPR dielectric surface due to excessive plasma pre-treatment conditions. During post-annealing at 150℃, the peel strength abruptly decreased from 0 h to 24 h, and then maintained constant until 100 h, which is also mainly due to the damage of WPR dielectric which is weak to high temperature. Therefore, the optimum plasma pre-treatment conditions on the surface of dielectric is essential to interfacial reliability of FOWLP RDL.

• ETRI Journal
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• v.31 no.6
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• pp.660-666
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• 2009

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.