• Journal of Power Electronics
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• v.16 no.3
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• pp.960-969
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• 2016

High-power three-level voltage-source converters are widely utilized in high-performance AC drive systems. In several ultra-power instances, the harmonics on the grid side should be reduced through multiple rectifications. A combined harmonic elimination method that includes a dual primary-side series-connected winding transformer and selective harmonic elimination pulse-width modulation is proposed to eliminate low-order current harmonics on the primary and secondary sides of transformers. Through an analysis of the harmonic influence caused by dead time and DC magnetic bias, a synthetic compensation control strategy is presented to minimize the grid-side harmonics in the dual primary side series-connected winding transformer application. Both simulation and experimental results demonstrate that the proposed control strategy can significantly reduce the converter input current harmonics and eliminates the DC magnetic bias in the transformer.

• The Journal of the Korea institute of electronic communication sciences
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• v.3 no.2
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• pp.79-85
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• 2008

It is important to consider the life of battery and low power operation for various wireless communications. Thus, Analog current-mode signal processing with SI circuit has been taken notice of in designing the LSI for wireless communications. However, in current mode signal processsing, current memory circuit has a problem called clock-feedthrough. In this paper, we examine the connection of CMOS switch that is the common solution of clock-feedthrough and calculate the relation of width between CMOS switch for design methodology for improvement of current memory. As a result of simulation, when the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the width relation in CMOS switch is obtained with $W_{Mp}=5.62W_{Mn}+1.6$, for the nMOS width of 2~6um in CMOS switch. And from the same simulation condition, it is obtained with $W_{Mp}=2.05W_{Mn}+23$ for the nMOS width of 6~10um in CMOS switch. Then the defined width relation of MOS transistor will be useful guidance in design for improvement of current memory.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.836-845
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• 2001

A Novel fully-differential bipolar current subtracter(FCS) and its application to current controlled current amplifier(CCCA) for high-accuracy current-mode signal processing were designed. To obtain full-differential current output, the FCS was symmetrically composed of two current follower with low current-input impedance. The CCCA to control output current by the bias current was consisted of the subtracter and a current gain amplifier(CGA) with single-ended current output.. The simulation result shows that the FCS has current-input impedance of 5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100 $\mu$A to 20 mA. The power dissipation of the FCS and CCCA are 1.8 mW and 3 mW, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.8
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• pp.593-600
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• 2010

In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 ${\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.9-9
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• 2010

In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

• Journal of Astronomy and Space Sciences
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• v.23 no.2
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• pp.161-166
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• 2006

In this paper, we describe the RLG current stabilizer circuit for attitude control in the satellite. The RLG makes use of the Sagnac effect within a resonant of a HeNe laser. The difference between two discharge currents causes one of the gyro bias errors. The theoretical background and current stabilizer are introduced. It is verified that the circuit designed is applicable to the test of input voltage and temperature.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.1
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• pp.30-34
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• 2005

This study shows the lasing characteristics of InGaAs/InGaAsP multiple-quantum-well waveguide-type depleted optical thyristor (DOT) using the vertical window. The measured switching voltage and current are 3.36 V and 10 ㎂, respectively. The lasing threshold current is 131 mA at 25 ℃. The output peak wavelength is 1570 nm at a bias current of 1.22 Ith and there is not input signal anymore in the output port. The vertical injection depleted optical thyristor - laser diode (VIDOT-LD) using the vertical-injection structure shows very good isolation between input and output signal.

• Journal of Advanced Marine Engineering and Technology
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• v.30 no.8
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• pp.901-906
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• 2006

In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.7
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• pp.683-693
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• 2011

In this paper, a design of high current and broad-band microwave bias-tee was presented for a stable bias of a high power amplifier. An input impedance of bias-tee should be shown to 50 ohm with the wideband in order to be stably-biased the amplifier. For this design of the bias-tee, a capacitor of bias-tee for a DC block was designed with a high wide-band admittance by a parallel sum of capacitors, and a inductor for a RF choke and a DC feeding was designed with a high wide-band impedance by a series sum of inductors. As this inductor and capacitor for the sum has each SRF, band-limitation of lumped element was driven from SRF. This limitation was overcome by control of a resonance's quality factor with adding a resistor. 1608 SMD chips for design's element was mounted on the this pattern for the designed bias-tee. The fabricated bias-tee presented 10 dB of return loss and wide-band about 50 ohm input impedance at 10 MHz~10 GHz.