• Proceedings of the Acoustical Society of Korea Conference
• /
• 1994.06a
• /
• pp.830-835
• /
• 1994

In this paper, a new method of statistically evaluating an output response probability distribution of a memory type non-linear system is practically derived based on a zero-memory type non-linear equivalent system. That is, first, the objective system is approximately and functionally separated into two functional parts, i.e., a zero-memory type non-linear part and a memory type linear part according to the well-known Wiener's idea. A whole mathematical frame of the output probability distribution is evaluated in an approximate but generalized form, based on the equivalent zero-memory type non-linear part. The memory effects between the input and the output of the system are reflected in the statistical parameters and the expansion coefficients.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.11 no.6
• /
• pp.335-341
• /
• 2016

As information technology advances rapidly, various smart devices are becoming an essential element in our lives. Smart devices are providing services to users through applications up on the operating system. Operating systems have a variety of rules, such as scheduling applications and controlling hardwares. Among those rules, it is significant to protect private information in the information-oriented society. Therefore, isolation task, that makes certain memory space separated for each application, should highly be guaranteed. However, modern operating system offers the function to access the memory space from other applications for the sake of debugging. If this ability is misused, private information can be leaked or modified. Even though the access authority to memory is strictly managed, there exist cases found exploited. In this paper, we analyze the problems of the function provided in the Android environment that is the most popular and opened operating system. Also, we discuss how to avoid such kind of problems and verify with experiments.

• Journal of Korea Multimedia Society
• /
• v.13 no.9
• /
• pp.1272-1284
• /
• 2010

As the mobile computers are becoming powerful and are used like general-purpose computers, operating systems for mobile computers also require swap system functionality that utilizes main memory efficiently. Flash memory is widely used as storage device for mobile computers but current linux swap system does not consider flash memory. Swap system is tightly related with process execution since it stores the contents of process in execution. By taking advantage of this characteristics, in this paper, we study a new linux swap system called PASS(Process-Aware Swap System), which allocates the different flash memory blocks to each process. Trace-driven experimental results show that PASS outperforms existing linux swap system with existing garbage collection schemes in terms of garbage collection cost.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.10 no.5
• /
• pp.539-548
• /
• 2015

In this paper, shared memory feature was developed in multi-core system with different OS for different processor-specific bus, while conducting an experiment on shared memory feature between the two processors based on embedded Linux system. For the purpose of developing shared memory in dual bus structure, memory controller was used, while managing shared memory segment through list data structure. For AMP multi-core test, Linux OS was installed in 2 processor cores. In addition, it verified the creation and use of shared memory by using kernel module implemented to test shared memory.

• Smart Media Journal
• /
• v.4 no.3
• /
• pp.16-23
• /
• 2015

As the IT technology advances, data processing system is required to handle and process large amounts of data. However, the existing On-Disk system has limit to process data which increase rapidly. For that reason, the In-Memory system is being used which saves and manages data on the fast memory not saving data into hard disk. Although it has fast processing capability, it is necessary to use the fault tolerance techniques in the In-Memory system because it has a risk of data loss due to volatility which is one of the memory characteristics. These fault tolerance techniques lead to performance degradation of In-Memory system. In this paper, we classify the data into Hot and Cold data in consideration of the data usage characteristics in the In-Memory system and propose compound backup technique to ensure data persistence. The proposed technique increases the persistence and improves performance degradation.

• Proceedings of the KSR Conference
• /
• 2010.06a
• /
• pp.1068-1074
• /
• 2010

In high speed railway, event recorder is essential system for analyzing the cause of train accident. It stores train operation sent by train control system in safe memory unit. Crash protected memory, the safe memory unit for event recorder, keeps the stored contents from severe environment. For crash protected memory, we have designed the architecture of concrete enclosure and controller board. Proposed system provides large volume of memory capacity and fault tolerance architecture. For checking the characteristics of proposed crash protected memory specification, the simulation is executed. Simulation results shows the designed crash protected memory meets all requirements.

• Journal of the Semiconductor & Display Technology
• /
• v.21 no.1
• /
• pp.85-90
• /
• 2022

In this paper, an asynchronous nonvolatile memory module using a self-diagnosis function was designed. For the system to work, a lot of data must be input/output, and memory that can be stored is required. The volatile memory is fast, but data is erased without power, and the nonvolatile memory is slow, but data can be stored semi-permanently without power. The non-volatile static random-access memory is designed to solve these memory problems. However, the non-volatile static random-access memory is weak external noise or electrical shock, data can be some error. To solve these data errors, self-diagnosis algorithms were applied to non-volatile static random-access memory using error correction code, cyclic redundancy check 32 and data check sum to increase the reliability and accuracy of data retention. In addition, the possibility of application to an asynchronous non-volatile storage system requiring reliability was suggested.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.29B no.10
• /
• pp.10-18
• /
• 1992

This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

• Proceedings of the IEEK Conference
• /
• 2003.07d
• /
• pp.1335-1338
• /
• 2003

Fixed-size memory allocation is one of the most promising way to avoid external fragmentation in dynamic memory allocation problem. This paper presents an experimental result of applying the fixed- size memory allocation strategy to Java virtual machine for embedded system. The result says that although this strategy induces another memory utilization problem caused by internal fragmentation, the effect is not very considerable and this strategy is well-suited for embedded Java system. The experiment has been performed in a real embedded Java system called the simpleRTJ.

• Journal of KIISE:Computer Systems and Theory
• /
• v.34 no.9
• /
• pp.445-458
• /
• 2007

This article presents a novel infrastructure for large-memory database processing using commodity hardware with operating system support. We exploit inexpensive PCs and a high-speed network capable of Remote Direct Memory Access (RDMA) operations to build a new memory hierarchy between fast volatile memory and slow disk storage. The new memory hierarchy guarantees a reasonable response time, and its storage size enables us to run large-memory database systems with little performance degradation. The proposed architecture has two main components: (1) a remote memory system inside the Linux kernel to manage other computers' memory pages efficiently and (2) a remote memory pager responsible for manipulating remote read/write operations on remote memory pages. We insist that the proposed architecture is practical enough to support the rigorous demands of commercial in-memory database systems by demonstrating the performance of publicly available main-memory databases (e.g., MySQL) on our prototyped system. The experimental results show very interesting results from the TPC-C benchmark.