• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.26-36
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• 2008

Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

• Tuberculosis and Respiratory Diseases
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• v.73 no.5
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• pp.273-277
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• 2012

Paraneoplastic limbic encephalitis (PLE) is a rare syndrome characterized by memory impairment, affective and behavioral disturbances and seizures. Among many different neoplasms known to cause PLE, small cell lung cancer (SCLC) is the most frequently reported. The pathogenesis is not fully understood but is believed to be autoimmune-related. We experienced a patient with typical clinical features of PLE. A 67-year-old man presented with seizure and disorientation. Brain magnetic resonance imaging demonstrated high signal intensity in the bilateral amygdala and hippocampus in flair and T2-weighted images suggestive of limbic encephalitis. Cerebrospinal fluid tapping revealed no evidence of malignant cells or infection. Positron emission tomography/computed tomography showed a lung mass with pleural effusion and a consequent biopsy confirmed the diagnosis of PLE associated with SCLC. The patient was subsequently treated with chemotherapy and neurologic symptoms gradually improved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2359-2368
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• 2013

In this paper, an IRD (internal read data) circuit preventing the reentry into the read mode while keeping the read-out DOUT datum at power-up even if noise such as glitches occurs at signal ports such as an input signal port RD (read) when a power IC is on, is proposed. Also, a pulsed WL (word line) driving method is used to prevent a DC current of several tens of micro amperes from flowing into the read transistor of a differential paired eFuse OTP cell. Thus, reliability is secured by preventing non-blown eFuse links from being blown by the EM (electro-migration). Furthermore, a compared output between a programmed datum and a read-out datum is outputted to the PFb (pass fail bar) pin while performing a sensing margin test with a variable pull-up load in consideration of resistance variation of a programmed eFuse in the program-verify-read mode. The layout size of the 8-bit eFuse OTP IP with a $0.18{\mu}m$ process is $189.625{\mu}m{\times}138.850{\mu}m(=0.0263mm^2)$.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.48 no.3
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• pp.82-90
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• 2011

Multi-core system is becoming more general with development of microprocessors. Due to this change in performance improvement paradigm, switching conventional single thread applications with multi thread applications. Performance monitoring tools are used to optimize application performance because of complexity in development of multi thread applications. Conventional performance monitoring tools are focused on performance itself rather than user friendliness or real-time support. Real-time performance monitor identify the problem while multi-threaded applications should be performed as well as check real-time operating status of the application. So it can be used as an effective tool compared to non-real-time performance monitor that only with simple performance indicators to find the cause of the problem. In this paper, we propose RMPM(Real-time Multi-core Performance Monitor) which is real-time performance monitoring tool for multi-core system. Observation period is optimized by comparing relation between overhead due to performance evaluation period and accuracy. Our performance monitor shows not only amount of CPU usage of whole system, memory usage, network usage but also aspect of overhead distribution per thread of an application.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.1
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• pp.57-67
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• 2005

Fast scalar multiplication of points on elliptic curve is important for elliptic curve cryptography applications. In order to vary field sizes depending on security situations, the cryptography coprocessors should support variable length finite field arithmetic units. To determine the effective variable length finite field arithmetic architecture, two well-known curve scalar multiplication algorithms were implemented on FPGA. The affine coordinates algorithm must use a hardware division unit, but the projective coordinates algorithm only uses a fast multiplication unit. The former algorithm needs the division hardware. The latter only requires a multiplication hardware, but it need more space to store intermediate results. To make the division unit versatile, we need to add a feedback signal line at every bit position. We proposed a method to mitigate this problem. For multiplication in projective coordinates implementation, we use a widely used digit serial multiplication hardware, which is simpler to be made versatile. We experimented with our implemented ECC coprocessors using variable length finite field arithmetic unit which has the maximum field size 256. On the clock speed 40 MHz, the scalar multiplication time is 6.0 msec for affine implementation while it is 1.15 msec for projective implementation. As a result of the study, we found that the projective coordinates algorithm which does not use the division hardware was faster than the affine coordinate algorithm. In addition, the memory implementation effectiveness relative to logic implementation will have a large influence on the implementation space requirements of the two algorithms.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.8-13
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• 2001

Cerium oxide ($CeO_2$) thin film has been proposed as a buffer layer between the ferroelectric thin film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS) structures for ferroelectric random access memory (FRAM) applications. In this study, $CeO_2$ thin films were etched with $Cl_2$/Ar gas mixture in an inductively coupled plasma (ICP). Etch properties were measured for different gas mixing ratio of $Cl_2$($Cl_2$+Ar) while the other process conditions were fixed at RF power (600 W), dc bias voltage (-200 V), and chamber pressure (15 mTorr). The highest etch rate of $CeO_2$ thin film was 230 ${\AA}$/min and the selectivity of $CeO_2$ to $YMnO_3$ was 1.83 at $Cl_2$($Cl_2$+Ar gas mixing ratio of 0.2. The surface reaction of the etched $CeO_2$ thin films was investigated using x-ray photoelectron spectroscopy (XPS) analysis. There is a Ce-Cl bonding by chemical reaction between Ce and Cl. The results of secondary ion mass spectrometer (SIMS) analysis were compared with the results of XPS analysis and the Ce-Cl bonding was monitored at 176.15 (a.m.u). These results confirm that Ce atoms of $CeO_2$ thin films react with chlorine and a compound such as CeCl remains on the surface of etched $CeO_2$ thin films. These products can be removed by Ar ion bombardment.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.4
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• pp.68-74
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• 2017

This paper presents a joint demosaicking and arbitrary-ratio down sampling algorithm for color filter array (CFA) images. Color demosaiking is a necessary part of image signal processing pipeline for many types of digital image recording system using single sensor. Also, such as smart phone, obtained high resolution image from image sensor has to be down-sampled to be displayed on the screen. The conventional solution is "Demosaicking first and down sampling later". However, this scheme requires a significant amount of memory and computational cost. Also, artifacts can be introduced or details get damaged during demosaicking and down sampling process. In this paper, we propose a method in which demosaicking and down sampling are working simultaneously. We use inverse mapping of Bayer CFA and then joint demosaicking and down sampling with arbitrary-ratio scheme based on signal decomposition of high and low frequency component in input data. Experimental results show that our proposed algorithm has better image quality performance and much less computational cost than those of conventional solution.

• IMMUNE NETWORK
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• v.5 no.2
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• pp.89-98
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• 2005

Background: DNA vaccination represents an anticipated approach for the control of numerous infectious diseases. Used alone, however, DNA vaccine is weak immunogen inferior to viral vectors. In recent, heterologous prime-boost vaccination leads DNA vaccines to practical reality. Methods: We assessed prime-boost immunization strategies with a DNA vaccine (minigene, $gB_{498-505}$ DNA) and recombinant vaccinia virus $(vvgB_{498-505})$ expressing epitope $gB_{498-505}$ (SSIEF ARL) of CD8+ T cells specific for glycoprotein B (gB) of herpes simplex virus (HSV). Animals were immunized primarily with $gB_{498-505}$ epitope-expressing DNA vaccine/recombinant vaccinia virus and boosted with alternative vaccine type expressing entire Ag. Results: In prime-boost protocols using vvgBw (recombinant vaccinia virus expressing entire Ag) and $vvgB_{498-505}$, CD8+ T cell-mediated immunity was induced maximally at both acute and memory stages if primed with vvgBw and boosted with $vvgB_{498-505}$ as evaluated by CTL activity, intracellular IFN-staining, and MHC class I tetramer staining. Similarly $gB_{498-505}$ DNA prime-gBw DNA (DNA vaccine expressing entire Ag) boost immunization elicited the strongest CD8+ T cell responses in protocols based on DNA vaccine. However, the level of CD8+ T cell-mediated immunity induced with prime-boost vaccination using DNA vaccine expressing epitope or entire Ag was inferior to those based on vvgBw and $vvgB_{498-505}$. Of particular interest CD8+ T cell-mediated immunity was optimally induced when $vvgB_{498-505}$ was used to prime and gB DNA was used as alternative boost. Especially CD7+ T cell responses induced by such protocol was longer lasted than other protocols. Conclusion: These facts direct to search for the effective strategy to induce optimal CD8+ T cell-mediated immunity against cancer and viral infection.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.145-155
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• 2013

In this paper, we proposed a $4{\times}4$ block parallel architecture of interpolation for high-performance H.264/AVC Fractional Motion Estimation in 8K UHD($7680{\times}4320$) video real time processing. To improve throughput, we design $4{\times}4$ block parallel interpolation. For supplying the $10{\times}10$ reference data for interpolation, we design 2D cache buffer which consists of the $10{\times}10$ memory arrays. We minimize redundant storage of the reference pixel by applying the Search Area Stripe Reuse scheme(SASR), and implement high-speed plane interpolator with 3-stage pipeline(Horizontal Vertical 1/2 interpolation, Diagonal 1/2 interpolation, 1/4 interpolation). The proposed architecture was simulated in 0.13um standard cell library. The gate count is 436.5Kgates. The proposed H.264/AVC Fractional Motion Estimation can support 8K UHD at 30 frames per second by running at 187MHz.

• Journal of the Korean Society for Library and Information Science
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• v.51 no.4
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• pp.99-120
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• 2017

In order to develop a semiautomatic support system that allows researchers concerned to efficiently analyze the technical trends for the ever-growing industry and market. This paper introduces a couple of Korean sentence generation models that can automatically generate definitional statements as well as descriptions of technical terms and concepts. The proposed models are based on a deep learning model called LSTM (Long Sort-Term Memory) capable of effectively labeling textual sequences by taking into account the contextual relations of each item in the sequences. Our models take technical terms as inputs and can generate a broad range of heterogeneous textual descriptions that explain the concept of the terms. In the experiments using large-scale training collections, we confirmed that more accurate and reasonable sentences can be generated by CHAR-CNN-LSTM model that is a word-based LSTM exploiting character embeddings based on convolutional neural networks (CNN). The results of this study can be a force for developing an extension model that can generate a set of sentences covering the same subjects, and furthermore, we can implement an artificial intelligence model that automatically creates technical literature.