• International Journal of Internet, Broadcasting and Communication
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• v.12 no.2
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• pp.30-36
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• 2020

We demonstrated a successful fabrication of 4" Gallium Nitride (GaN)/Diamond High Electron Mobility Transistors (HEMTs) incorporated with Inner Slot Via Hole process. We made in manufacturing technology of 4" GaN/Diamond HEMT wafers in a compound semiconductor foundry since reported [1]. Wafer thickness uniformity and wafer flatness of starting GaN/Diamond wafers have improved greatly, which contributed to improved processing yield. By optimizing Laser drilling techniques, we successfully demonstrated a through-substrate-via process, which is last hurdle in GaN/Diamond manufacturing technology. To fully exploit Diamond's superior thermal property for GaN HEMT devices, we include Aluminum Nitride (AlN) barrier in epitaxial layer structure, in addition to conventional Aluminum Gallium Nitride (AlGaN) barrier layer. The current collapse revealed very stable up to Vds = 90 V. The trapping behaviors were measured Emission Microscope (EMMI). The traps are located in interface between Silicon Nitride (SiN) passivation layer and GaN cap layer.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.127-128
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• 2000

Organic light-emitting diodes(OLEDs) are constructed using multilayer organic thin films. The hole-transport layer is PVK and the emitting material is rubrene and $Alq_3$. The emitting layer is doped with rubrene partially. As the partially-doped layer migrate from the interface PVK/emitting layer, the emission peak of rubrene decrease and diminish. By comparing with the previous reports, we propose the zero-field hole injection barrier at ITO/PVK interface and hole-trapping effect of rubrene in host materials as predominant factor to determine the emission zone.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.6
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• pp.1266-1272
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• 2012

An InGaZnO thin film transistor with different gate lengths and widths have been fabricated and their device degradations with device sizes have been also performed after negative gate bias stress. The threshold voltage and subthreshold swing have been decreased with decrease of gate length. However, the threshold voltages were increased with the decrease of gate lengths. The transfer curves were negatively shifted after negative gate stress and the threshold voltage was decreased. However, the subthreshold swing was not changed after negative gate stress. This is due to the hole trapping in the gate dielectric materials. The decreases of the threshold voltage variation with the decrease of gate length and the increase of gate width were believed due to the less hole injection into gate dielectrics after a negative gate stress.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.12
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• pp.77-87
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• 1993

PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.

• Proceedings of the KSME Conference
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• 2004.11a
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• pp.1104-1109
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• 2004

The present study has been conducted to investigate convective heat/mass transfer inside the cooling passage with bleed holes. The rotating square channel has 40.0 mm hydraulic diameter and the bleed holes on the leading surface of the channel. The hole diameter of bleed hole is 4.5 mm and its spacing (P/d=4.9) is about five times of hole diameter. Mass flow rate through bleed holes is 10% of the main flow rate and rotation number is changed form 0.0 to 0.4. A naphthalene sublimation technique is employed to determine the detailed local heat transfer coefficients using the heat and mass transfer analogy. The cooling performance is influenced by mass flow rate through bleed holes and Coriolis force of rotating channel for fixed reynolds number. The heat transfer is enhanced around holes on the leading surface because of trapping flow by bleeding. However heat transfer on the leading surface is decreased due to Coriolis force.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.21-29
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• 2004

Hot carrier degradation characteristics of Nano-scale CMOSFETs with dual gate oxide have been analyzed in depth. It is shown that, PMOSFET lifetime dominate the device lifetime than NMOSFET In Nano-scale CMOSFETs, that is, PMOSFET lifetime under CHC (Channel Hot Carrier) stress is much lower than NMOSFET lifetime under DAHC (Dram Avalanche Hot Carrier) stress. (In case of thin MOSFET, CHC stress showed severe degradation than DAHC for PMOSFET and DAHC than CHC for NMOSFET as well known.) Therefore, the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor in upcoming Nano-scale CMOSFET technology. In case of PMOSFETs, CHC shows enhanced degradation than DAHC regardless of thin and thick PMOSFETs. However, what is important is that hot hole injection rather than hot electron injection play a important role in PMOSFET degradation i.e. threshold voltage increases and saturation drain current decreases due to the hot carrier stresses for both thin and thick PMOSFET. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method. Therefore, suppression of PMOSFET hot carrier degradation or hot hole injection is highly necessary to enhance overall device lifetime or circuit lifetime in Nano-scale CMOSFET technology

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.70-73
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• 2006

Pentacene films, grown on polyethylene terephthalate (PET) substrates, were doped with Iodine. ESR measurements were made for the films in the temperature range of 100-300 K. Two regimes of doping stages were discernible: a light (intercalation) doping regime and a heavy doping regime. The light doping regime was concluded to be dominated by localized holes that were trapped at low temperatures, which indicated trap states near the valence band edge.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.226-226
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• 2013

Si is a dominant solar material, which is the second most abundant element in the earth giving a benefit in the aspect in cost with low toxicity. However, the inherent limit of Si has an indirect band gap of 1.1 eV resulting in the limited optical absorption. Therefore, a critical issue has been raised to increase the utilization of the incident light into the Si absorber. The enhancement of light absorption is a crucial to improve the performances and thus relieves the cost burden of Si photovoltaics. For the optical aspect, an efficient design of a front surface, where the incident light comes in, has been intensively investigated to improve the performance of photon absorption. Lambertian light trapping can be attained when the light active surface is ideally rough to increase the optical length by about 50 compared to a planar substrate. This suggests that an efficient design may reduce thickness of the Si absorber from the conventional 100~300 ${\mu}m$ to less than 3 ${\mu}m$. Theoretically, a hole-array structure satisfies an equivalent efficiency of c-Si with only one-twelfth mass and one-sixth thickness. Various approaches have been applied to improve the incident light utilization in a Si absorber using textured structures, periodic gratings, photonic crystals, and nanorod arrays. We have designed hole and pillar structured Si absorbers. Four-different Si absorbers have been simultaneously fabricated on an identical Si wafer with hole arrays or pillar arrays at a fixed depth of 2 ${\mu}m$. We have found that the significant enhanced solar cell performances both for the hole arrayed and pillar arrayed Si absorbers compared to that of a planar Si wafer resulting from the effective improvement in the quantum efficiencies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.7-13
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• 2004

Experimental results are presented for the degradation of 3 nm-thick gate oxide under -2.5V $\leq$ V$_{g}$ $\leq$-4.0V stress and 10$0^{\circ}C$ conditions using P and NMOSFETs that are annealed with hydrogen or deuterium gas at high-pressure (5 atm). The degradation mechanisms are highly dependent on stress conditions. For low gate voltage, hole-trapping is found to dominate the reliability of gate oxide both in P and NMOSFETs. With increasing gate voltage to V$_{g}$ =-4.0V, the degradation becomes dominated by electron-trapping in NMOSFETs, however, the generation rate of "hot" hole was very low, because most of tunneling electrons experienced the phonon scattering before impact ionization at the Si interface. Statistical parameter variations as well as the gate leakage current depend on and are improved by high-pressure deuterium annealing, compared to corresponding hydrogen annealing. We therefore suggest that deuterium is effective in suppressing the generation of traps within the gate oxide. Our results therefore prove that hydrogen related processes are at the origin of the investigated oxide degradation.gradation.

• Journal of Information Display
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• v.2 no.3
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• pp.1-5
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• 2001

The effect of doping on the energy transfer and charge carrier trapping processes has been studied in organic light-emitting diodes (OLEDs) doped with a fluorescent laser dye. The devices consisted of N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1,1-biphenyl-4,4'-diamine (TPD) as a hole transporting layer, tris(8-hydroxyquinoline) aluminum ($Alq_3$) as the host, and a fluorescent dye, 4-dicyanomethylene-2-methyl-6-[2-(2,3,6,7-tetrahydro-1 H,5H-benzo[i,j]quinolizin-8-yl) vinyl]-4H-pyran) (DCM2) as the dopant. Temperature dependence of the current-voltage-luminescence (I-V-L) characteristics, the electroluminescence (EL) and photoluminescence (PL) spectra are studied in the temperature ranging between 15 K and 300 K. The emission from DCM2 was seen to be much stronger compared with the emission from $Alq_3$, indicative of efficient energy transfer from $Alq_3$ to DCM2. In addition, the EL emission from DCM2 increasd with increasing temperature while the emission from the host $Alq_3$ decreased. The result indicates that direct charge carrier trapping becomes efficient with increasing temperature. The EL emission from DCM2 shows a slightly sublinear dependence on the current density, implying the enhanced quenching of excitons at high current densities due to the exciton-exciton annihilation.