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http://dx.doi.org/10.6109/jkiice.2012.16.6.1266

Device Degradation with Gate Lengths and Gate Widths in InGaZnO Thin Film Transistors  

Lee, Jae-Ki (가천대학교 전자공학과)
Park, Jong-Tae (인천대학교 전자공학과)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.16, no.6, 2012 , pp. 1266-1272 More about this Journal
Abstract
An InGaZnO thin film transistor with different gate lengths and widths have been fabricated and their device degradations with device sizes have been also performed after negative gate bias stress. The threshold voltage and subthreshold swing have been decreased with decrease of gate length. However, the threshold voltages were increased with the decrease of gate lengths. The transfer curves were negatively shifted after negative gate stress and the threshold voltage was decreased. However, the subthreshold swing was not changed after negative gate stress. This is due to the hole trapping in the gate dielectric materials. The decreases of the threshold voltage variation with the decrease of gate length and the increase of gate width were believed due to the less hole injection into gate dielectrics after a negative gate stress.
Keywords
InGaZnO thin film transistor; device degradation; hole trapping;
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