• Title/Summary/Keyword: hole filling

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Low Cost Via-Hole Filling Process Using Powder and Solder (파우더와 솔더를 이용한 저비용 비아홀 채움 공정)

  • Hong, Pyo-Hwan;Kong, Dae-Young;Nam, Jae-Woo;Lee, Jong-Hyun;Cho, Chan-Seob;Kim, Bonghwan
    • Journal of Sensor Science and Technology
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    • v.22 no.2
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    • pp.130-135
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    • 2013
  • This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.

A Stereo Matching Technique using Multi-directional Scan-line Optimization and Reliability-based Hole-filling (다중방향성 정합선 최적화와 신뢰도 기반 공백복원을 이용한 스테레오 정합)

  • Baek, Seung-Hae;Park, Soon-Young
    • The KIPS Transactions:PartB
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    • v.17B no.2
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    • pp.115-124
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    • 2010
  • Stereo matching techniques are categorized in two major schemes, local and global matching techniques. In global matching schemes, several investigations are introduced, where cost accumulation is performed in multiple matching lines. In this paper, we introduce a new multi-line stereo matching techniques which expands a conventional single-line matching scheme to multiple one. Matching cost is based on simple normalized cross correlation. We expand the scan-line optimization technique to a multi-line scan-line optimization technique. The proposed technique first generates a reliability image, which is iteratively updated based on the previous reliability measure. After some number of iterations, the reliability image is completed by a hole-filling algorithm. The hole-filling algorithm introduces a disparity score table which records the disparity score of the current pixel. The disparity of an empty pixel is determined by comparing the scores of the neighboring pixels. The proposed technique is tested using the Middlebury and CMU stereo images. The error analysis shows that the proposed matching technique yields better performance than using conventional global matching algorithm.

Fabrication of Through-hole Interconnect in Si Wafer for 3D Package (3D 패키지용 관통 전극 형성에 관한 연구)

  • Kim, Dae-Gon;Kim, Jong-Woong;Ha, Sang-Su;Jung, Jae-Pil;Shin, Young-Eui;Moon, Jeong-Hoon;Jung, Seung-Boo
    • Journal of Welding and Joining
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    • v.24 no.2
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    • pp.64-70
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    • 2006
  • The 3-dimensional (3D) chip stacking technology is a leading technology to realize a high density and high performance system in package (SiP). There are several kinds of methods for chip stacking, but the stacking and interconnection through Cu filled through-hole via is considered to be one of the most advanced stacking technologies. Therefore, we studied the optimum process of through-hole via formation and Cu filling process for Si wafer stacking. Through-hole via was formed with DRIE (Deep Reactive ion Etching) and Cu filling was realized with the electroplating method. The optimized conditions for the via formation were RE coil power of 200 W, etch/passivation cycle time of 6.5 : 6 s and SF6 : C4F8 gas flow rate of 260 : 100 sccm. The reverse pulsed current of 1.5 A/dm2 was the most favorable condition for the Cu electroplating in the via. The Cu filled Si wafer was chemically and mechanically polished (CMP) for the following flip chip bumping technology.

Hole-filling Algorithm Based on Extrapolating Spatial-Temporal Background Information for View Synthesis in Free Viewpoint Television (자유 시점 TV에서 시점 합성을 위한 시공간적 배경 정보 추정 기반 홀 채움 방식)

  • Kim, Beomsu;Nguyen, Tien-Dat;Hong, Min-cheol
    • Journal of IKEEE
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    • v.20 no.1
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    • pp.31-44
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    • 2016
  • This paper presents a hole-filling algorithm based on extrapolating spatial-temporal background information used in view synthesis for free-viewpoint television. A new background codebook is constructed and updated in order to extract reliable temporal background information. In addition, an estimation of spatial local background values is conducted to discriminate an adaptive boundary between the background region and the foreground region as well as to update the information about the hole region. The holes then are filled by combining the spatial background information and the temporal background information. In addition, an exemplar-based inpainting technique is used to fill the rest of holes, in which a priority function using background-depth information is defined to determine the order in which the holes are filled. The experimental results demonstrated that the proposed algorithm outperformed the other comparative methods about average 0.3-0.6 dB, and that it synthesized satisfactory views regardless of video characteristics and type of hole region.

Effects of Fully Filling Deep Electron/Hole Traps in Optically Stimulated Luminescence Dosimeters in the Kilovoltage Energy Range

  • Chun, Minsoo;Jin, Hyeongmin;Lee, Sung Young;Kwon, Ohyun;Choi, Chang Heon;Park, Jong Min;Kim, Jung-in
    • Journal of Radiation Protection and Research
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    • v.47 no.3
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    • pp.134-142
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    • 2022
  • Background: This study investigated the characteristics of optically stimulated luminescence dosimeters (OSLDs) with fully filled deep electron/hole traps in the kV energy ranges. Materials and Methods: The experimental group consisted of InLight nanoDots, whose deep electron/hole traps were fully filled with 5 kGy pre-irradiation (OSLDexp), whereas the non-pre-irradiated OSLDs were arranged as a control group (OSLDcont). Absorbed doses for 75, 80, 85, 90, 95, 100, and 105 kVp with 200 mA and 40 ms were measured and defined as the unit doses for each energy value. A bleaching device equipped with a 520-nm long-pass filter was used, and the strong beam mode was used to read out signal counts. The characteristics were investigated in terms of fading, dose sensitivities according to the accumulated doses, and dose linearity. Results and Discussion: In OSLDexp, the average normalized counts (sensitivities) were 12.7%, 14.0%, 15.0%, 10.2%, 18.0%, 17.9%, and 17.3% higher compared with those in OSLDcont for 75, 80, 90, 95, 100, and 105 kVp, respectively. The dose accumulation and bleaching time did not significantly alter the sensitivity, regardless of the filling of deep traps for all radiation qualities. Both OSLDexp and OSLDcont exhibited good linearity, by showing coefficients determination (R2) > 0.99. The OSL sensitivities can be increased by filling of deep electron/hole traps in the energy ranges between 75 and 105 kVp, and they exhibited no significant variations according to the bleaching time.

A Study on Local Hole Filling and Smoothing of the Polygon Model (폴리곤모델의 국부적 홀 메움 및 유연화에 관한 연구)

  • Yoo, Dong-Jin
    • Journal of the Korean Society for Precision Engineering
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    • v.23 no.9 s.186
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    • pp.190-199
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    • 2006
  • A new approach which combines implicit surface scheme and recursive subdivision method is suggested in order to fill the holes with complex shapes in the polygon model. In the method, a base surface is constructed by creating smooth implicit surface from the points selected in the neighborhood of holes. In order to assure C$^1$ continuity between the newly generated surface and the original polygon model, offset points of same number as the selected points are used as the augmented constraint conditions in the calculation of implicit surface. In this paper the well-known recursive subdivision method is used in order to generate the triangular net with good quality using the hole boundary curve and generated base implicit surface. An efficient anisotropic smoothing algorithm is introduced to eliminate the unwanted noise data and improve the quality of polygon model. The effectiveness and validity of the proposed method are demonstrated by performing numerical experiments for the various types of holes and polygon model.

Via Filling in Fine Pitched Blind Via Hole of Microelectronic Substrate (마이크로 전자기판의 미세 피치 블라인드 비아홀의 충진 거동)

  • Yi Min-Su;Lee Hyo-S.
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.43-49
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    • 2006
  • The properties, behavior and reliability of the residual void in blind via hole(BVH) were carried out for the shape of BVH using the void extraction process. The residual void was perfectly removed in the specimens applied by the void extraction process, which was improved by 40% rather than the conventional process. The residual void in BVH was to be eliminated under a condition of 1.5 atm for more 30 sec with regardless of the shape of BVH. It was also observed that the residual void in BVH was not formed after the reliability test with JEDEC standard.

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Selective Contact Hole Filling by electroless Ni Plating (무전해 Ni 도금에 의한 선택적 CONTACT HOLE 충전)

  • 우찬희;권용환;김영기;박종완;이원해
    • Journal of the Korean institute of surface engineering
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    • v.25 no.4
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    • pp.189-206
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    • 1992
  • The effect of activation and electroless nickel plating conditions on contact properties was investi-gated for selective electroless nickel plating of Si wafers in order to obtain an optimum condition of con-tact hole filling. According to RCA prosess, p-type silicon (100) surface was cleaned out and activated. The effects of temperature, DMAB concentration, time, and strirring were investigated for activation of p-type Si(100) surface. The optimal activation condition was 0.2M HF, 1mM PdCl2, 2mM EDTA,$ 70^{\circ}C$, and 90sec under ultrasonic vibration. In electroless nickel plating, the effect of temperature, DMAB concentra-tion, pH, and plating time were studied. The optimal plating condition found was 0.10M NiSO4.H2O, 0.11M Citrate, pH 6.8, $60^{\circ}C$, 30minutes. The contact resistance of films was comparatively low. It took 30minutes to obtain 1$\mu\textrm{m}$ thick film with 8mM DMAB concentration. The film surface roughness was improved with decreasing temperature and decreasing pH of the plating solution. The best quality of the film was obtained at the condition of temperature $60^{\circ}C$ and pH 6.0. The micro-vickers hardness of film was about 800Hv. Plating rate of nickel on the hole pattern was slower than that of nickel on the line pattern.

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Hole Filling Algorithm for a Virtual-viewpoint Image by Using a Modified Exemplar Based In-painting

  • Ko, Min Soo;Yoo, Jisang
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.1003-1011
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    • 2016
  • In this paper, a new algorithm by using 3D warping technique to effectively fill holes that are produced when creating a virtual-viewpoint image is proposed. A hole is defined as the region that cannot be seen in the reference view when a virtual view is created. In the proposed algorithm, to reduce the blurring effect that occurs on the hole region filled by conventional algorithms and to enhance the texture quality of the generated virtual view, Exemplar Based In-painting algorithm is used. The boundary noise which occurs in the initial virtual view obtained by 3D warping is also removed. After 3D warping, we estimate the relative location of the background to the holes and then pixels adjacent to the background are filled in priority to get better result by not using only adjacent object's information. Also, the temporal inconsistency between frames can be reduced by expanding the search region up to the previous frame when searching for most similar patch. The superiority of the proposed algorithm compared to the existing algorithms can be shown through the experimental results.

Manufacturing of Copper(II) Oxide Powder for Electroplating from NaClO3 Type Etching Wastes

  • Hong, In Kwon;Lee, Seung Bum;Kim, Sunhoe
    • Journal of Electrochemical Science and Technology
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    • v.11 no.1
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    • pp.60-67
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    • 2020
  • In this study, copper (II) oxide powder for electroplating was prepared by recovering CuCl2 from NaClO3 type etching wastes via recovered non-sintering two step chemical reaction. In case of alkali copper carbonate [mCuCo3·nCu(OH)2], first reaction product, CuCo3 is produced more than Cu(OH)2 when the reaction molar ratio of sodium carbonate is low, since m is larger than n. As the reaction molar ratio of sodium carbonate increased, m is larger than n and Cu(OH)2 was produced more than CuCO3. In the case of m has same values as n, the optimum reaction mole ratio was 1.44 at the reaction temperature of 80℃ based on the theoretical copper content of 57.5 wt. %. The optimum amount of sodium hydroxide was 120 g at 80℃ for production of copper (II) oxide prepared by using basic copper carbonate product of first reaction. At this time, the yield of copper (II) oxide was 96.6 wt.%. Also, the chloride ion concentration was 9.7 mg/L. The properties of produced copper (II) oxide such as mean particle size, dissolution time for sulfuric acid, and repose angle were 19.5 mm, 64 second, and 34.8°, respectively. As a result of the hole filling test, it was found that the copper oxide (II) prepared with 120 g of sodium hydroxide, the optimum amount of basic hydroxide for copper carbonate, has a hole filling of 11.0 mm, which satisfies the general hole filling management range of 15 mm or less.