• Title/Summary/Keyword: high-temperature annealing

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Effect of Annealing and Co contents on the Structural and Physical Properties in AlN Thin Films

  • Han, Chang-Suk;Han, Seung-Oh
    • Journal of the Korean Society for Heat Treatment
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    • v.23 no.6
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    • pp.331-337
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    • 2010
  • Aluminum nitride (AlN) thin films containing various amounts of Co content have been deposited by using a two-facing targets type sputtering (TFTS) system. The deposited films were also annealed successively and isothermally at different temperatures. Annealing treatment can control the physical properties as well as the microstructure of AlN films with Co particles. High magnetization and high resistivity are obtainable in AlN films containing dispersed Co particles. The coercivity of the films does not depend on annealing time, but it increases with increasing annealing temperature due to the increase of the grain size. A high saturation magnetization of 46 kG and resistivity of 2200 ${\mu}{\Omega}$-cm was obtained for AlN films containing 25 at% Co.

Optical Properties of High-k Gate Oxides Obtained by Spectroscopic Ellipsometer (분광 타원계측기를 이용한 고굴절률 게이트 산화막의 광물성 분석)

  • Cho, Yong-Jai;Cho, Hyun-Mo;Lee, Yun-Woo;Nam, Seung-Hoon
    • Proceedings of the KSME Conference
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    • 2003.11a
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    • pp.1932-1938
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    • 2003
  • We have applied spectroscopic ellipsometry to investigate $high-{\kappa}$ dielectric thin films and correlate their optical properties with fabrication processes, in particular, with high temperature annealing. The use of high-k dielectrics such as $HfO_{2}$, $Ta_{2}O_{5}$, $TiO_{2}$, and $ZrO_{2}$ as the replacement for $SiO_{2}$ as the gate dielectric in CMOS devices has received much attention recently due to its high dielectric constant. From the characteristics found in the pseudo-dielectric functions or the Tauc-Lorentz dispersions, the optical properties such as optical band gap, polycrystallization, and optical density will be discussed.

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Low-temperature crystallization of high-dielectric (Ba,Sr)$TiO_3$ thin films for embedded capacitors

  • Cho, Kwang-Hwan;Kang, Min-Gyu;Kang, Chong-Yun;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03a
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    • pp.21-21
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    • 2010
  • (Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

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Screen printed contacts formation by rapid thermal annealing in multicrystalline silicon solar cells

  • Kim, Kyung hae;U. Gangopadhyay;Han, Chang-Soo;K. Chakrabarty;J. Yi
    • Journal of Korean Vacuum Science & Technology
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    • v.6 no.3
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    • pp.120-125
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    • 2002
  • The aim of the present work is to optimized the annealing parameter in both front and back screen printed contacts realization on p-type multicrystalline silicon and with phosphorus diffused. The RTA treatments were carried out at various temperatures from 600 to 850$\^{C}$ and annealing time ranging from 3 min to 5 min in air, O$_2$and N$_2$ ambiance. The contacts parameters are obtained according to Transmission Line Model measurements. A good RTA cycle is obtained with a temperature plateau of 700$\^{C}$-750$\^{C}$ and annealing ambiance of air. Several processing parameters required for good cell efficiency are discussed with an emphasis placed on the critical role of the glass frit in the aluminum paste. A anamolus behaviour of Aluminum n-doping on p-type Si wafer, contact at high temperature have also been studied.

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Passivation of Silicon Oxide Film Deposited at Low Temperature by Annealing in Nitrogen Ambient (저온공정 실리콘 산화막의 질소 패시베이션 효과)

  • Kim, Jun-Sik;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.334-338
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    • 2006
  • Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.

Hafnium Oxide Layer Based Metal-Oxide-Semiconductor (MOS) Capacitors with Annealing Temperature Variation

  • Lee, Na-Yeong;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.318.1-318.1
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    • 2016
  • Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

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Charaterization of GaN Films Grown on Si(100) by RF Magnetron Sputtering (RF magnetron sputtering 방법에 의해 Si(100) 기판 위에 성장된 GaN 박막의 특성에 대한 연구)

  • 이용일;성웅제;박천일;최우범;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.570-573
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    • 2001
  • In this paper, GaN films have been grown on SiO$_2$/Si(100) substrates by RF magnetron sputtering. To obtain high quality GaN films, we used ZnO buffer layer and modified the process conditions. The charateristics of GaN films on RF power, substrate temperature and Ar/N$_2$gas ratio have been investigated by Auger electron spectroscopy and X-ray diffraction analysis. At RF power 150W, substrate temperature 500 $^{\circ}C$ and Ar/N$_2$=1:2 gas ratio, we could grow high quality GaN films. Through the atomic force microscope and photoluminescence analysises, it was observed that the crystallization of GaN films was improved with increasing annealing temperature and the optimal crystallization of GaN films was found at 1100 $^{\circ}C$ annealing temperature.

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Analysis of Electrical Characteristics of Oxide Semiconductor of ZnO, SnO2 and ZTO (ZnO, SnO2, ZTO 산화물반도체의 전기적인 특성 분석)

  • Oh, Teresa
    • Korean Journal of Materials Research
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    • v.25 no.7
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    • pp.347-351
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    • 2015
  • To study the characteristics of ZTO, which is made using a target mixed $ZnO:SnO_2=1:1$, the ZnO and $SnO_2$ were analyzed using PL, XRD patterns, and electrical properties. Resulting characteristics were compared with the electrical characteristics of ZnO, $SnO_2$, and ZTO. The electrical characteristics of ZTO were found to improve with increasing of the annealing temperature due to the high degree of crystal structures at high temperature. The crystal structure of $SnO_2$ was also found to increase with increasing temperatures. So, the structure of ZTO was found to be affected by the annealing temperature and the molecules of $SnO_2$; the optical property of ZTO was similar to that of ZnO. Among the ZTO films, ZTO annealed at the highest temperature showed the highest capacitance and Schottky contact.

Dependence of contact resistance in SiC device by annealing conditions (어닐링 조건에 의한 SiC 소자에서 콘택저항의 변화)

  • Kim, Seong-Jeen
    • Journal of IKEEE
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    • v.25 no.3
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    • pp.467-472
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    • 2021
  • Stable operation of semiconductor devices is needed even at high temperatures. Among the structures of semiconductor devices, the area that can cause unstable electrical responses at high temperatures is the contact layer between the metal and the semiconductor. In this study, the effect of annealing conditions included in the process of forming a contact layer of nickel silicide(NiSix) on a p-type SiC layer on the specific contact resistance of the contact layer and the total resistance between the metal and the semiconductor was investigated. To this end, a series of electrodes for TLM (transfer length method) measurements were patterned on the 4 inch p-type SiC layer under conditions of changing annealing temperature of 1700 and 1800 ℃ and annealing time of 30 and 60 minutes. As a result, it was confirmed that the annealing conditions affect the resistance of the contact layer and the electrical stability of the device.

Tribological Characteristics of FDTS & OTS SAM according to Annealing Temperature (FDTS와 OTS SAM의 어닐링 온도에 따른 트라이볼로지 특성)

  • 양지철;김대은
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.1
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    • pp.240-247
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    • 2003
  • The tribological characteristics of FDTS (1H, 1H, 2H, 2H-Perflurodecyltrichlorosilane) SAM (self-assembled monolayer) and OTS (octadecyltrichlorosilane) SAM treated by high temperature annealing have been investigated from the viewpoint of stiction, adhesion and friction in micro/nano scale. From the experimental results, it was found that OTS SAM gets destroyed at 20$0^{\circ}C$ and stiction, adhesion and friction coefficient increased, but FDTS SAM was stable up to 40$0^{\circ}C$. Also, it was found that the friction coefficient of normal OTS SAM below 20$0^{\circ}C$ is lower than that of FDTS SAM in micro/nano scale, but stiction and adhesion is vice versa. This work shows the importance of surface group of self-assembled monolayer in dictating the tribological characteristics and thermal stability.