• Advances in aircraft and spacecraft science
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• v.10 no.1
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• pp.1-18
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• 2023

This paper investigates the integrated control of an air-breathing hypersonic vehicle considering the safety of propulsion system under acceleration. First, the vehicle/engine coupling model that contains a control-oriented vehicle model and a quasi-one-dimensional dual-mode scramjet model is established. Next, the coupling process of the integrated control system is introduced in detail. Based on the coupling model, the integrated control framework is studied and an integrated control system including acceleration command generator, vehicle attitude control loop and engine multivariable control loop is discussed. Then, the effectiveness and superiority of the integrated control system are verified through the comparison of normal case and limiting case of an air-breathing hypersonic scramjet coupling model. Finally, the main results show that under normal acceleration case and limiting acceleration case, the integrated control system can track the altitude and speed of the vehicle extremely well and adjust the angle deflection of elevator to offset the thrust moment to maintain the attitude stability of the vehicle, while assigning the two-stage fuel equivalent ratio to meet the thrust performance and safety margin of the engine. Meanwhile, the high-acceleration requirement of the air-breathing hypersonic vehicle makes the propulsion system operating closer to the extreme dangerous conditions. The above contents demonstrate that considering the propulsion system safety will make integrated control system more real and meaningful.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.950-956
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• 1986

In this paper, a direct addressing mode of a microprocessor is introduced to save memory capacity, and also a dedicated digital filter is constructed to speed up the filter processing and to enable an easy selection of the impulse response types. A theoretical analysis has been conducted on the errors caused by the finite word klength, rounding-off and multiplication procedures. The digital filter designed by the proposed method is made into a module which can function as a 7th-order recursive or a 14-order nonrecursive type with a simples witch operation. The proposed filter is implemented on a printed-circuit board. The frequency characteristics of this filter can be controlled by the multiplication values stored in ROMs. A low-pass, a high-pass and a band-pass filter have been designed and their frequency characteristics are verified by actual measurements. For a order higher filer, two filter modules have been cascaded into an integrated filter of 23rd-order non-recursive low-pass type and a 12th-order recursive multiband type. Their frequency characteirstics have been found to agree with the theory.

• KEPCO Journal on Electric Power and Energy
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• v.6 no.2
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• pp.173-179
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• 2020

Electric vehicles (EVs) using lithium secondary batteries (LIBs) with excellent power and long-term cycle performance are gaining interest as the successors of internal combustion engine (ICE) vehicles. However, there are few systematic researches for fast charging to satisfy customers' needs. In this study, we compare the degradation of LIB where its composition is LiNi_0.5Co_0.2Mn_0.3/Graphite with the constant current and constant power-charging method. The charging speed was set to 1C, 2C, 3C and 4C in the constant current mode and the value of constant power was calculated based on the energy at each charging speed. Therefore, by analyzing the battery degradation based on the same charging energy but different charging method; CP charging method can slow down the battery degradation at a high rate of 3C through the voltage curve, capacity retention and DC-IR. However, when the charging rate was increased by 4C or more, the deviation between the LIBs dominated the degradation than the charging method.

• Transactions of the Korean Society of Automotive Engineers
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• v.14 no.6
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• pp.112-119
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• 2006

This paper is concerned with the light-weight design of a center-pillar assembly for the high-speed side impact of vehicle using advanced high strength steels(AHSS). Steel industries continuously promote the ULSAB-AVC project for applying AHSS to structural parts as an alternative way to improve the crashworthiness and the fuel efficiency because it has the superior strength compared to the conventional steel. In order to simulate deformation behavior of the center-pillar assembly, a simplified center-pillar model is developed and parts of that are subdivided employing tailor-welded blanks(TWB) in order to control the deformation shape of the center-pillar assembly. The thickness of each part which constitutes the simplified model is selected as a design parameter. Factorial design is carried out aiming at the application and configuration of AHSS to simplified side-impact analysis because it needs tremendous computing time to consider all combinations of parts. In optimization of the center-pillar, S-shaped deformation is targeted to guarantee the reduction of the injury level of a driver dummy in the crash test. The objective function is constructed so as to minimize the weight and lead to S-shape deformation mode. Optimization also includes the weight reduction comparing with the case using conventional steels. The result shows that the AHSS can be utilized effectively for minimization of the vehicle weight and induction of S-shaped deformation.

• The KIPS Transactions:PartA
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• v.14A no.5
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• pp.301-308
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• 2007

This paper proposes high performance coprocessor architecture for real time dense disparity computation based on a phase-based binocular stereo matching technique called local weighted phase-correlation(LWPC). The algorithm combines the robustness of wavelet based phase difference methods and the basic control strategy of phase correlation methods, which consists of 4 stages. For parallel and efficient hardware implementation, the proposed architecture employs SIMD(Single Instruction Multiple Data Stream) architecture for each functional stage and all stages work on pipelined mode. Such that the newly devised pipelined linear array processor is optimized for the case of row-column image processing eliminating the need for transposed memory while preserving generality and high throughput. The proposed architecture is implemented with Xilinx HDL tool and the required hardware resources are calculated in terms of look up tables, flip flops, slices, and the amount of memory. The result shows the possibility that the proposed architecture can be integrated into one chip while maintaining the processing speed at video rate.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.7-13
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• 1998

The VLSI devices of submicron level trend to have a lowering of reliability because of hot carriers by two dimensional influences which are caused by short channel effects and which are not generated in a long channel devices. In order to minimize the two dimensional influences, much research has been made into various types of source/drain structures. MOS typed tunnel transistor with Schottky barrier junctions at source/drain, which has the advantages in fabrication process, downsizing and response speed, has been proposed. The experimental device was fabricated with p type silicon, and manifested the transistor action, showing the unsaturated output characteristics and the high transconductance comparing with that in field effect mode. The results of trial indicate for better performance as follows; high doped channel layer to lower the driving voltage, high resistivity substrate to reduce the leakage current from the substrate to drain.

• KEPCO Journal on Electric Power and Energy
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• v.2 no.2
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• pp.227-232
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• 2016

To test the effectiveness of using an energy storage system for frequency regulation, the Energy New Business Laboratory at KEPCO Research Institute installed a 4 MW energy storage system (ESS) demonstration facility at the Jocheon Substation on Jeju Island. And after the successful completion of demonstration operations, a total of 52 MW ESS for frequency regulation was installed in Seo-Anseong (28 MW, governor-free control) and in Shin-Yongin (24 MW, automatic generation control). The control system used in these two sites was based on the control system developed for the 4 MW ESS demonstration facility. KEPCO recently finished the construction of 184 MW ESS for frequency regulation in 8 locations, (e.g. Shin-Gimjae substation, Shin-Gaeryong substation, etc.) and they are currently being tested for automatic operation. KEPCO plans to construct additional ESS facilities (up to a total of about 500 MW for frequency regulation by 2017), thus, various operational tests would first have to be conducted. The high-speed characteristic of ESS can negatively impact the power system in case the 500 MW ESS is not properly operated. At this stage we need to verify how effectively the 500 MW ESS can regulate frequency. In this paper, the effect of using ESS for frequency regulation on the power system of Korea was studied. Simulations were conducted to determine the effect of using a 524 MW ESS for frequency regulation. Models of the power grid and the ESS were developed to verify the performance of the operation system and its control system. When a high capacity power plant is tripped, a 24 MW ESS supplies power automatically and 4 units of 125MW ESS supply power manually. This study only focuses on transient state analysis. It was verified that 500 MW ESS can regulate system frequency faster and more effectively than conventional power plants. Also, it was verified that time-delayed high speed operations of multiple ESS facilities do not negatively impact power system operations. It is recommended that further testing be conducted for a fleet of multiple ESSs with different capacities distributed over multiple substations (e.g. 16, 24, 28, and 48 MW ESS distributed across 20 substations) because each ESS measures frequency individually. The operation of one ESS facility will differ from the other ESSs within the fleet, and may negatively impact the performance of the others. The following are also recommended: (a) studies wherein all ESSs should be operated in automatic mode; (b) studies on the improvement of individual ESS control; and (c) studies on the reapportionment of all ESS energies within the fleet.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.184-193
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• 2012

In this paper, a 5-bit 2-GS/s 2-way time interleaved pipeline ADC for high-speed serial link receiver is demonstrated. Implemented as a current-mode amplifier, the stage ADC simultaneously processes the tracking and residue amplification to achieve higher sampling rate. In addition, each stage incorporates a built-in 1-tap FIR equalizer, reducing inter-symbol-interference (ISI）without an extra digital post-processing. The ADC is designed in a 110nm CMOS technology. It comsumes 91mW from a 1.2-V supply. The area excluding the memory block is $0.58{\times}0.42mm^2$. Simulation results show that when equalizer is enabled, the ADC achieves SNDR of 25.2dB and ENOB of 3.9bits at 2.0GS/s sample rate for a Nyquist input signal. When the equalizer is disengaged, SNDR is 26.0dB for 20MHz-1.0GHz input signal, and the ENOB of 4.0bits.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.693-697
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• 2007

The SSB modem performs the modulation process which converts the digital voltage level to the audible frequency band signal and the demodulation process which converts reversely the audible frequency signal to the digital voltage level. The modulator and the demodulator are implemented with a single DSP chip. Because of the SSB specific character, the distortion occurs when the frequency is changed. This distortion has no effect on voice communication, but it has an significant effect on data communication. In other words, it is impossible to send data stream with adjacent 2 periods. Therefore, in case of using 2-tone FSK, it is needed to send at least 3 periods to transmit 1 bit. Therefore we implemented the modem using modified phase-delay shift keying to transmit 1 tone signal for high speed transmission. In the 1200[bps] mode, it generates 0, $187{\mu}s$ delay time at 1.3kHz symbol frequency, and in the 2400[bps] mode, 0, $70{\mu}s$, $130{\mu}s$, $200{\mu}s$ delay time at 1.5kHz symbol frequency. Finally, in the maximum 3600[bps] mode, it generates 0, $100{\mu}s$, $160{\mu}s$, $250{\mu}s$ delay time at 2.0kHz symbol frequency. The measured results of the implemented SSB modem shows a good transfer functional characteristic by spectrum analyzer, almost same bandwidth in pass band and 20dB higher SNR comparing the German PACTOR and American CLOVER and in the experimental transmitting test, we verified the transmitted data is received correctly in platform.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.10
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• pp.1852-1857
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• 2007

The SSB modem performs the modulation process which converts the digital voltage level to the audible frequency band signal and the demodulation process which converts reversely the audible frequency signal to the digital voltage level. The modulator and the demodulator are implemented with a single DSP chip. Because of the SSB specific character, the distortion occurs when the frequency is changed. This distortion has no effect on voice communication but it has an significant effect on data communication. In other words, it is impossible to send data stream with adjacent 2 periods. Therefore, in case of using 2-tone FSK, it is needed to send at least 3 periods to transmit 1 bit. Therefore we implemented the modem using modified phase-delay shift keying to transmit 1 tone signal for high speed transmission. In the 1200[bps] mode, it generates 0, $187{\mu}s$, delay time at 1.3kHz symbol frequency, and in the 2400[bps] mode, 0, $70{\mu}s\;130{\mu}s\;200{\mu}s$, delay time at 1.5kHz symbol frequency. Finally, in the maximum 3600[bps] mode, it generates 0, $100{\mu}s\;160{\mu}s\;250{\mu}s$ 2.0kHz symbol frequency. The measured results of the implemented SSB modem shows a good transfer functional characteristic by spectrum analyzer, almost same bandwidth in pass band and 20dB higher SNR comparing the emu FACTOR and American CLOVER and in the experimental transmitting test, we verified the transmitted data is received correctly in platform.