• Transactions on Electrical and Electronic Materials
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• 제14권5호
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• pp.246-249
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• 2013

Graphene was obtained on Cu foil by thermal decomposition method. A gas mixture of $H_2$ and $CH_4$ and an ambient annealing temperature of $1,000^{\circ}C$ were used during the deposition for 30 Min., and for the transfer onto $SiO_2/Si$ and Si substrates. The physical properties of graphene were investigated with regard to the effect ofnitrogen atom doping and the various substrates used. The G/2D ratio decreased when the graphene became monolayer graphene. The graphene grown on $SiO_2/Si$ substrate showed a low intensity of the G/2D ratio, because the polarity of the $SiO_2$ layer improved the quality of graphene. The intensity of the G/2D ratio of graphene doped with nitrogen atoms increased with the doping time. The quality of graphene depended on the concentration of the nitrogen doping and chemical properties of substrates. High-quality monolayer graphene was obtained with a low G/2D ratio. The increase in the intensity of the G/2D ratios corresponded to a blue shift in the 2D peaks.

• 한국재료학회지
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• 제30권8호
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• pp.399-405
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• 2020

In the present investigation we show the effect of Al doping on the length, size, shape, morphology, and sensing property of ZnO nanorods. Effect of Al doping ultimately leads to tuning of electrical and optical properties of ZnO nanorods. Undoped and Al-doped well aligned ZnO nanorods are grown on sputtered ZnO/SiO₂/Si (100) pre-grown seed layer substrates by hydrothermal method. The molar ratio of dopant (aluminium nitrate) in the solution, [Al/Zn], is varied from 0.1 % to 3 %. To extract structural and microstructural information we employ field emission scanning electron microscopy and X-ray diffraction techniques. The prepared ZnO nanorods show preferred orientation of ZnO <0001> and are well aligned vertically. The effects of Al doping on the electrical and optical properties are observed by Hall measurement and photoluminescence spectroscopy, respectively, at room temperature. We observe that the diameter and resistivity of the nanorods reach their lowest levels, the carrier concentration becomes high, and emission peak tends to approach the band edge emission of ZnO around 0.5% of Al doping. Sensing behavior of the grown ZnO nanorod samples is tested for H₂ gas. The 0.5 mol% Al-doped sample shows highest sensitivity values of ~ 60 % at 250 ℃ and ~ 50 % at 220 ℃.

• 한국표면공학회지
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• 제47권5호
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• pp.227-232
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• 2014

In this study, we propose the application of doping process technology for atmospheric pressure plasma. The plasma treatment means the wafer is warmed via resistance heating from current paths. These paths are induced by the surface charge density in the presence of illuminating Argon atmospheric plasmas. Furthermore, it is investigated on the high-concentration doping to a selective partial region in P type solar cell wafer. It is identified that diffusion of impurities is related to the wafer temperature. For the fixed plasma treatment time, plasma currents were set with 40, 70, 120 mA. For the processing time, IR(Infra-Red) images are analyzed via a camera dependent on the temperature of the P type wafer. Phosphorus concentrations are also analyzed through SIMS profiles from doped wafer. According to the analysis for doping process, as applied plasma currents increase, so the doping depth becomes deeper. As the junction depth is deeper, so the surface resistance is to be lowered. In addition, the surface charge density has a tendency inversely proportional to the initial phosphorus concentration. Overall, when the plasma current increases, then it becomes higher temperatures in wafer. It is shown that the diffusion of the impurity is critically dependent on the temperature of wafers.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.195-196
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• 2008

결정질 실리콘 웨이퍼의 도핑농도와 도핑깊이, 비저항은 태양전지의 효율을 결정하는데 매우 중요한 요소이다. 높은 효율을 갖는 태양전지의 설계를 위해 PC1D를 이용해 태양전지의 에미터 도핑농도와 깊이, 베이스 비저항을 조절하였다. 최적화 결과 emitter peak doping $1\times10^{19}cm^{-3}$와 depth factor $1{\mu}m$, base $\rho$ $ 0.1\Omega$-cm, 즉 sheet resistance $69.15\Omega$/square와 $X_j$ $1.603{\mu}m$일 때 $I_{sc}$ = 5.478(A), $V_{oc}$ = 0.7013(V), $P_{max}$ = 2.828(W), FF = 73.61(%), Efficiency = 19.03(%)의 고효율을 얻을 수 있다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.35-36
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• 2009

In this work, we demonstrate 800V 4H-SiC power DMOSFETs with several structural alterations to obtain a low threshold voltage ($V_{TH}$) and a high figure of merit ($V_B^2/R_{SP,ON}$). To optimize the device performance, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. These parameters are optimized using 2D numerical simulation and the 4H-SiC DMOSFET structure results in a threshold voltage ($V_{TH}$) below ~3.8V, and high figure of merit ($V_B^2/R_{SP,ON}$>${\sim}200MW/cm^2$) for a power MOSFET in $V_B$-800V range.

• 한국재료학회지
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• 제14권5호
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• pp.328-333
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• 2004

Transparent ZnO:Al conductor films for the optoelectronic devices were deposited by using the capacitively coupled DC magnetron sputtering method. The effect of Al doping concentration and discharge power on the electrical and optical properties of the films was studied. The film resistivity of $8.5${\times}$10^{-4}$ $\Omega$-cm was obtained at the discharge power of 40 W with the ZnO target doped with 2 wt% $Al_2$$_O3$. The transmittance of the 840 nm thick film was 91.7% in the visible waves. Increasing doping concentration of 3 wt% $Al_2$$O_3$ in ZnO target results in significant decrease of film resistivity, which may be due to the formation of $Al_2$$O_3$ particles in the as-deposited ZnO:Al film and the reduced ZnO grain sizes. Increasing DC power from 40 to 60 W increases deposition rate by more than 50%, but can induce high defect density in the film, resulting in higher film resistivity.

• 마이크로전자및패키징학회지
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• 제24권2호
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• pp.49-53
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• 2017

Cl 불순물 도핑에 따른 $SnSe_2$ 이차원 전자소재의 고온(300~450 K) 전도 물성 변화를 고찰하였다. 고상합성법을 통하여, 도핑이 없는 $SnSe_2$ 소재와 Cl이 도핑된 $SnSe_{1.994}Cl_{0.006}$ 소재를 합성하였으며, X선 회절 실험을 통하여, 두 재료 모두 불순물 없는 단일상이 형성되었음을 확인하였다. 비저항의 온도의존성 측정을 통하여, 전기 전도 mechanism이 Cl 도핑에 의해 hopping 전도에서 축퇴 전도로의 전이가 일어남을 관찰할 수 있었으며, 홀효과 측정을 통해 그러한 전도 mechanism의 전이가, Cl의 효과적인 donor 역할에 따른 자유전자의 농도 증가에서 기인한 것임을 확인하였다. 온도에 따른 전자이동도의 변화 분석을 통하여, 도핑이 없는 $SnSe_2$의 고온 전기 전도는 grain boundary 산란이 지배적인 영향을 미치는 반도체 전도 특성을 보이는 반면, Cl 도핑에 따라 grain boundary 산란 효과가 저하되는 금속 전도 특성을 보인다는 것을 알 수 있었다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.465-468
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• 1998

For porous silicon layer to be used as active layer in various devices, it is necessary to be formed locally along with a designed pattern on the wafer. However, there is still no suitable masking layer to withstand against the high concentration of HF for a time of some minutes up to some hours during the anodic process effectively. In this work, we investigated the property of selectivity between p$^{+}$ and n layers to form localized porous silicon even without a mask by the difference of the anodic I-V characteristics on the doping level and doping type. The width of the pattern made in the sample was 2mm, and the formed porous silicon layer was observed by SEM to see the morphology on the cross section below the surface. As the results, it was found that the selectivity was reasonable for the pattern size over 100.mu.m.m.

• 대한전기학회논문지
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• 제36권7호
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• pp.462-469
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• 1987

A metal gate MOSFET with source/drain regions self-aligned to gate region is proposed. The proposed MOS transistor is fabricated by utilizing the higher oxidation rate of source/drain regions with high doping concentration when compared with channel region with moderate doping. The thick oxide on the source/drain regions reduces the gate and drain(source) overlap capacitance down to that of a self-aligned polysilicon gate device while allowing the use of a metal gate with much lower resistivity than the more commonly used polycrystalline silicon. A ring oscillator composed of 15 inverter stages has been computer simulated using SPICE. The results of the simulation show good agreement with experimental measurement confirming the fast switching speed of propesed MOSFET.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.354-355
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• 2008

The sensitivity and sensing margin of SOI(silicon on insulator) nano-wire BioFET(field effect transistor) were investigated by using back-gate bias. The channel conductance modulation was affected by doping concentration, channel length and channel width. In order to obtain high sensitivity and large sensing margin, low doping concentration, long channel and narrow width are required. We confirmed that the electrical sensing by back-gate bias is effective method for evaluation and optimization of bio-sensor.