• 제목/요약/키워드: high cut-off frequency

검색결과 158건 처리시간 0.025초

원반던지기의 운동학적 분석 (The kinematics analysis of Discus throwing)

  • 김종인;선재복
    • 한국운동역학회지
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    • 제13권2호
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    • pp.29-47
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    • 2003
  • This study is to analyze the kinematic variables in release motion of discuss throwing. For the matter, 5 people from the national team and collegiate discuss throwing in the year 2001 were chosen as the subjects and two S-VHS video cameras set in 60frames/sec were used for recording their motions. Coordinated raw positions data through digitizing are smoothing by butter-worth 's low-pass filtering method at a cut off frequency 6.0Hz. and the direct linear transformation(DLT) method was employed to obtain 3-D position coordinates. The conclusions were as follows; 1. The better record players showed the shorter approach time in the last support phase. 2. In the displacement CG, the better record players showed the shorter displacement in medial-lateral direction, and the longer displacement in horizontal direction. In the motion, the COG showed longer displacement vertical direction. 3. The better record players showed the faster horizontal velocity than vertical velocity in the release. 4. The better record players showed to take the posture of vertical axis in the release.

Average 기법에 의한 Visual-TEP의 검출과 DC-Drift 제거에 의한 TEP 신호개선에 관한 연구 (Studies on the Detection of Visual-TEP with Average Method & the Improvement of TEP with DC-Drift Elinination)

  • 배병훈;최정미
    • 대한의용생체공학회:의공학회지
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    • 제15권2호
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    • pp.135-142
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    • 1994
  • This paper presents average method to detect Visual-Transient Evoked Potential from the human scalp electric potential measured by the ElectroEncephaloGram. To confirm the validity of average method, the average-process is performed with both stimulated and no-stimulated potentials respectively, and both results are compared. The specific waveform, which is visual-transient evoked potential, is produced only in the case of stimulated potential. It was found that a dc-drift, due to instrumentation errors and other noises, can produce significant changes in the evoked-potential waveform. This can be removed with a high-pass filter (cut-off frequency=0.5Hz).

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CSA 시스템을 위한 양극 뇌파증폭기의 개발 (Development of a High-Performance Bipolar EEG Amplifier for CSA System)

  • 유선국;김창현;김선호;김동준
    • 대한의용생체공학회:의공학회지
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    • 제20권2호
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    • pp.205-212
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    • 1999
  • 수술실에서 수술도중 환자의 뇌파를 관찰하고자 할 경우에 전기수술기를 사용하게 되면 매우 높은 주파수와 큰 전압의 전기적 잡음이 발생하게 되며, 기존의 뇌파측정기는 이 잡음에 의해서 포화되어 뇌파 측정이 불가능하다. 본 연구에서는 고신뢰도의 뇌파 측정용 CSA 시스템을 구성하기 위하여 전기수술기의 간섭이 적은 양극 뇌파증폭기를 개발하고자 하였다. 개발된 양극 뇌파 증폭기는 balanced filter를 사용하여 전기수술기의 잡음이 뇌파 증폭기의 입력으로 들어가는 것을 줄이도록 하였으며, 전치증폭기의 전원과 신호를 접지와 분리하여 전기수술기에서 나온 전류가 뇌파 증폭기를 통해 접지로 흘러 들어가는 경로를 차단하였고, 높은 주파수에서도 CMRR 특성이 좋은 차동증폭기를 사용하여 고주파 성분의 공통 성분 잡음을 제거함으로써 전기수술기의 잡음을 상당히 줄일 수 있었다. 이와 같이 개발된 양극 뇌파증폭기는 고이득, 저잡음, 높은 CMRR, 고입력 임피던스, 낮은 열잡음 등의 특성을 가지므로 순수한 뇌파의 측정에 유용하며, 전기수술기를 사용할 경우에도 지속적으로 뇌파를 측정할 수 있는 고신뢰도의 CSA 시스템의 구현에 이용할 수 있다.

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초고속 동작을 위한 더블 게이트 MOSFET 특성 분석 (Analysis of Double Gate MOSFET characteristics for High speed operation)

  • 정학기;김재홍
    • 한국정보통신학회논문지
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    • 제7권2호
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    • pp.263-268
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    • 2003
  • 본 논문에서는 main gate(MG)와 side gate(SG)를 갖는 double gate(DG) MOSFET 구조를 조사하였다. MG가 50nm일 때 최적의 SG 전압은 약 3V임을 알 수 있었고, 각각의 MG에 대한 최적의 SG 길이는 약 70nm임을 알 수 있었다. DG MOSFET는 매우 작은 문턱 전압 roll-off 특성을 나타내고, 전류-전압 특성곡선에서 VMG=VDS=1.5V, VSG=3V인 곳에서 포화전류는 550$\mu\textrm{A}$/m임을 알 수 있었다. subthrehold slope는 82.6㎷/decade, 전달 컨덕턴스는 l14$\mu\textrm{A}$/$\mu\textrm{m}$ 그리고 DIBL은 43.37㎷이다 다중 입력 NAND 게이트 로직 응용에 대한 이 구조의 장점을 조사하였다. 이때, DG MOSFET에서 41.4GHz의 매우 높은 컷오프 주파수를 얻을 수 있었다.

A Capacitor-Charging Power Supply Using a Series-Resonant Three-Level Inverter Topology

  • Song I. H.;Shin H. S.;Choi C. H.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.301-303
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    • 2001
  • In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

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PHEMT Passivation을 위한 ${Si_3}{N_4}$ (Studies on the deposition of ${Si_3}{N_4}$ for the passivation of PHEMT's)

  • 신재완;박현창;박형무;이진구
    • 대한전자공학회논문지SD
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    • 제39권1호
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    • pp.25-30
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    • 2002
  • 본 논문에서는 PECVD 장비를 이용하여 PHEMT 소자의 passivation 막으로 사용되는 Si₃N₄박막의 특성을 최적화하고, 0.25 ㎛급 PHEMT 제작에 적용하였다. 제작된 PHEMT(60 ㎛×2 fingers)의 소자 특성을 측정한 결과, passivation 후 드레인 포화전류와 최대 전달 컨덕턴스는 passivation 전보다 각각 2.7% 와 3%씩 증가하였으며, 전류이득 차단 주파수는 53 ㎓, 최대 공진 주파수는 105 ㎓ 였다.

DC and RF Characteristics of $0.15{\mu}m$ Power Metamorphic HEMTs

  • Shim, Jae-Yeob;Yoon, Hyung-Sup;Kang, Dong-Min;Hong, Ju-Yeon;Lee, Kyung-Ho
    • ETRI Journal
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    • 제27권6호
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    • pp.685-690
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    • 2005
  • DC and RF characteristics of $0.15{\mu}m$ GaAs power metamorphic high electron mobility transistors (MHEMT) have been investigated. The $0.15{\mu}m{\times}100{\mu}m$ MHEMT device shows a drain saturation current of 480 mA/mm, an extrinsic transconductance of 830 mS/mm, and a threshold voltage of -0.65 V. Uniformities of the threshold voltage and the maximum extrinsic transconductance across a 4-inch wafer were 8.3% and 5.1%, respectively. The obtained cut-off frequency and maximum frequency of oscillation are 141 GHz and 243 GHz, respectively. The $8{\times}50{\mu}m$ MHEMT device shows 33.2% power-added efficiency, an 18.1 dB power gain, and a 28.2 mW output power. A very low minimum noise figure of 0.79 dB and an associated gain of 10.56 dB at 26 GHz are obtained for the power MHEMT with an indium content of 53% in the InGaAs channel. This excellent noise characteristic is attributed to the drastic reduction of gate resistance by the T-shaped gate with a wide head and improved device performance. This power MHEMT technology can be used toward 77 GHz band applications.

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Bulk-Si와 PD-SOI에 형성된 SiGe p-MOSFET의 전기적 특성의 비교 (Comparison of Electrical Characteristics of SiGe pMOSFETs Formed on Bulk-Si and PD-SOI)

  • 최상식;최아람;김재연;양전욱;한태현;조덕호;황용우;심규환
    • 한국전기전자재료학회논문지
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    • 제20권6호
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    • pp.491-495
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    • 2007
  • This paper has demonstrated the electrical properties of SiGe pMOSFETs fabricated on both bulk-Si and PD SOI substrates. Two principal merits, the mobility increase in strained-SiGe channel and the parasitic capacitance reduction of SOI isolation, resulted in improvements in device performance. It was observed that the SiGe PD SOI could alleviate the floating body effect, and consequently DIBL was as low as 10 mV/V. The cut-off frequency of device fabricated on PD SOI substrate was roughly doubled in comparison with SiGe bulk: from 6.7 GHz to 11.3 GHz. These experimental result suggests that the SiGe PD SOI pMOSFET is a promising option to drive CMOS to enhance performance with its increased operation frequency for high speed and low noise applications.

Analysis and Control of NPC-3L Inverter Fed Dual Three-Phase PMSM Drives Considering their Asymmetric Factors

  • Chen, Jian;Wang, Zheng;Wang, Yibo;Cheng, Ming
    • Journal of Power Electronics
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    • 제17권6호
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    • pp.1500-1511
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    • 2017
  • The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.

DFT를 이용한 계통연계 인버터 시스템의 고정밀 계측 (High Precise Measurement of Grid-Connected Inverter using DFT)

  • 이상혁;강필순;이상훈;조수억;이태원;박성준
    • 전력전자학회논문지
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    • 제17권2호
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    • pp.93-98
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    • 2012
  • A precise measurement of the grid voltage is one of the essential techniques, which is required to connect a renewable energy to the grid. In general, when a filter is used to eliminate unnecessary harmonics and noises, a signal is distorted by phase delay, amplitude attenuation, and other distortions. And the response characteristic of a controller is directly affected by bandwidth of cut-off frequency of the filter. To alleviate this problems, we propose an effective algorithm based on DFT(Discrete Fourier Transform) instead of approaching the filter application. The proposed algorithm ensures high precise measurement of the grid voltage because it can extract the fundamental and harmonics from the raw signal without any distortions. The high performance of the proposed algorithm is verified by PSIM simulation and experiments of Grid-Connected VSI.