• Title/Summary/Keyword: hermetic sealing

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Design and Fabrication of a Low-cost Wafer-level Packaging for RF Devices

  • Lim, Jae-Hwan;Ryu, Jee-Youl;Choi, Hyun-Jin;Choi, Woo-Chang
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.2
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    • pp.91-95
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    • 2014
  • This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE) or electro-plating, in order to reduce the fabrication cost. Gold (Au)/Tin (Sn) alloy was utilized as the solder material for bonding and hermetic sealing. The small size fabricated WLP of $1.04{\times}1.04{\times}0.4mm^3$ had an average shear strength of 10.425 $kg/mm^2$, and the leakage rate of all chips was lower than $1.2{\times}10^{-5}$ atm.cc/sec. These results met Military Standards 883F (MIL-STD-883F). As the newly proposed WLP structure is simple, and its process technology is inexpensive, the fabricated WLP is a good candidate for thin film type RF devices.

P2O5-ZnO-SiO2-R2O Glass Frit Materials for Hermetic Sealing of Dye-Sensitized Solar Cells

  • Lee, Hansol;Lee, Choon Yeob;Hwang, Jae Kwun;Chung, Woon Jin
    • Journal of the Korean Ceramic Society
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    • v.54 no.5
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    • pp.400-405
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    • 2017
  • $P_2O_5-ZnO-SiO_2-R_2O$ glasses were synthesized as a sealing material for large scale dye-sensitized solar cells (DSSC). Compositional effects of $P_2O_5$ and ZnO were examined by varying their contents. Their viscosity and glass stability at sintering temperatures of less than $550^{\circ}C$ were examined by flow button test. Glass transition temperature and structural change upon compositional change were investigated. Chemical stability against electrolyte was also examined by immersing the glasses in the electrolyte for 72 h at $85^{\circ}C$.

Wafer-level Vacuum Packaging of a MEMS Resonator using the Three-layer Bonding Technique (3중 접합 공정에 의한 MEMS 공진기의 웨이퍼레벨 진공 패키징)

  • Yang, Chung Mo;Kim, Hee Yeoun;Park, Jong Cheol;Na, Ye Eun;Kim, Tae Hyun;Noh, Kil Son;Sim, Gap Seop;Kim, Ki Hoon
    • Journal of Sensor Science and Technology
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    • v.29 no.5
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    • pp.354-359
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    • 2020
  • The high vacuum hermetic sealing technique ensures excellent performance of MEMS resonators. For the high vacuum hermetic sealing, the customization of anodic bonding equipment was conducted for the glass/Si/glass triple-stack anodic bonding process. Figure 1 presents the schematic of the MEMS resonator with triple-stack high-vacuum anodic bonding. The anodic bonding process for vacuum sealing was performed with the chamber pressure lower than 5 × 10-6 mbar, the piston pressure of 5 kN, and the applied voltage was 1 kV. The process temperature during anodic bonding was 400 ℃. To maintain the vacuum condition of the glass cavity, a getter material, such as a titanium thin film, was deposited. The getter materials was active at the 400 ℃ during the anodic bonding process. To read out the electrical signals from the Si resonator, a vertical feed-through was applied by using through glass via (TGV) which is formed by sandblasting technique of cap glass wafer. The aluminum electrodes was conformally deposited on the via-hole structure of cap glass. The TGV process provides reliable electrical interconnection between Si resonator and aluminum electrodes on the cap glass without leakage or electrical disconnection through the TGV. The fabricated MEMS resonator with proposed vacuum packaging using three-layer anodic bonding process has resonance frequency and quality factor of about 16 kHz and more than 40,000, respectively.

Fabrication and Characterization of Window Metallization Pattern for Optical Module Package (광모듈 패키지용 Window 의 Metallization Pattern 제작 및 특성 평가)

  • Jo Hyeon Min;Dan Seong Baek;Ryu Heon Wi;Gang Nam Gi
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.239-242
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    • 2003
  • Optical module package is a hermetic metal-ceramic package for carrying optical IC. In case of LD(laser diode) module, window is used for both the path of optical signal and hermetic sealing of package. So, window has the metallization pattern on the surface for brazing process with package wall. In this study, several method were investigated for metallization. Thin film, thick film and mixed method were used for fabrication of metallization pattern. After brazing process, hermeticity and adhesion strength were tested for characterization of metallization pattern.

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Thin and Hermetic Packaging Process for Flat Panel Display Application

  • Kim, Young-Cho;Jeong, Jin-Wook;Lee, Duck-Jung;Choi, Won-Do;Lee, Sang-Geun;Ju, Byeong-Kwon
    • Journal of Information Display
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    • v.3 no.1
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    • pp.11-16
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    • 2002
  • This paper presents a study on the tubeless Plasma Display Panel (PDP) packaging using glass-to-glass electrostatic bonding with intermediate amorphous silicon. The bonded sample sealing the mixed gas with three species showed high strength ranging from 2.5 MPa to 4 MPa. The glass-to-glass bonding for packaging was performed at a low temperature of $180^{\circ}C$ by applying bias of 250 $V_{dc}$ in ambient of mixed gases of He-Ne(27 %)-Xe(3 %). The tubeless packaging was accomplished by bonding the support glass plate of $30mm{\times}50mm$ on the rear glass panel and the capping glass of $20mm{\times}20mm$. The 4-inch color AC-PDP with thickness of 8 mm was successfully fabricated and fully emitted as white color at a firing voltage of 190V.

Mechanical Reliability Issues of Copper Via Hole in MEMS Packaging (MEMS 패키징에서 구리 Via 홀의 기계적 신뢰성에 관한 연구)

  • Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.29-36
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    • 2008
  • In this paper, mechanical reliability issues of copper through-wafer interconnections are investigated numerically and experimentally. A hermetic wafer level packaging for MEMS devices is developed. Au-Sn eutectic bonding technology is used to achieve hermetic sealing, and the vertical through-hole via filled with electroplated copper for the electrical connection is also used. The MEMS package has the size of $1mm{\times}1mm{\times}700{\mu}m$. The robustness of the package is confirmed by several reliability tests. Several factors which could induce via hole cracking failure are investigated such as thermal expansion mismatch, via etch profile, and copper diffusion phenomenon. Alternative electroplating process is suggested for preventing Cu diffusion and increasing the adhesion performance of the electroplating process. After implementing several improvements, reliability tests were performed, and via hole cracking as well as significant changes in the shear strength were not observed. Helium leak testing indicated that the leak rate of the package meets the requirements of MIL-STD-883F specification.

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Effect of an Additive on the Physical and Electrical Properties of the B2O3-ZnO-Bi2O3 Glass System for a Sheath Heater Module (Sheath Heater 모듈 실링용 B2O3-ZnO-Bi2O3계 유리소재 및 첨가제에 따른 물성 변화)

  • Choi, Jinsam;Shin, Dong Woo;Bae, Won Tae
    • Journal of the Korean Ceramic Society
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    • v.50 no.1
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    • pp.57-62
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    • 2013
  • We investigated the thermal and electrical properties of the $B_2O_3-ZnO-Bi_2O_3$ glass system as a sealing material in sheath heater modules. A composition with over 90 wt% $Bi_2O_3$ in the $B_2O_3-ZnO-Bi_2O_3$ system was glassified by controlling the cooling rate. The glass transition temperature and thermal expansion coefficient in bismate glass could be controlled by the minor ingredients of ZnO, $SiO_2$, $BaO_2$, and $K_2O$. The $B_2O_3-ZnO-Bi_2O_3$ glass system bonded well to metal, and bismate glass insulating properties were comparable to those of bismate glass $B_2O_3-ZnO-PbO$ glass system in a sheath heater module.

Preparation and Characterization of Solder Glass for Electronic IC Package (IC Package 봉착용 결정화 유리의 제조와 특성에 관한 연구)

  • 손명모;감직상;박희찬;이서우;문종수
    • Journal of the Korean Ceramic Society
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    • v.26 no.6
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    • pp.829-835
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    • 1989
  • Devitrifing solder glasses in a specific group of glass ceramic materials are extensively used in hermetically sealing alumina electronics packages. Preferred frit glass compositions of this study consist of 37~40wt% PbO, 35~40wt% ZnO, 18~20wt% B2O3, 1~3wt% SiO2, 0~6wt% TiO2. The coated frit glasses crystallize during firing and form a strong hermetic seal. DTA and X-ray diffraction were used to characterize crystallization of the glass frit. Frit seal containing 2wt% TiO2 has crystallization temperature of 550~57$0^{\circ}C$ with surface nucleation. Frit seal containing 6wt% TiO2 has crystallization temperature of 515~5$25^{\circ}C$ with bulk nucleation, and the main crystalline phase was perovskite lead titanate having minus expansion coefficient. The average activation energy for the crystallization calculated from Ozawa equation was 65$\pm$10kcal/mol.

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A novel wafer-level-packaging scheme using solder (쏠더를 이용한 웨이퍼 레벨 실장 기술)

  • 이은성;김운배;송인상;문창렬;김현철;전국진
    • Journal of the Semiconductor & Display Technology
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    • v.3 no.3
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    • pp.5-9
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    • 2004
  • A new wafer level packaging scheme is presented as an alternative to MEMS package. The proof-of-concept structure is fabricated and evaluated to confirm the feasibility of the idea for MEMS wafer level packaging. The scheme of this work is developed using an electroplated tin (Sn) solder. The critical difference over conventional ones is that wafers are laterally bonded by solder reflow after LEGO-like assembly. This lateral bonding scheme has merits basically in morphological insensitivity and its better bonding strength over conventional ones and also enables not only the hermetic sealing but also its electrical interconnection solving an open-circuit problem by notching through via-hole. The bonding strength of the lateral bonding is over 30 Mpa as evaluated under shear and the hermeticity of the encapsulation is 2.0$\times10^{-9}$mbar.$l$/sec as examined by pressurized Helium leak rate. Results show that the new scheme is feasible and could be an alternative method for high yield wafer level packaging.

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The Design Method of TR Module Based GaN for Satellite (실용위성 적용을 위한 GaN 기반 TR모듈 설계 기법)

  • Yang, Ho-Jun;Lee, Yu-ri;Cho, Seongmin;Yu, Kyungdeok;Kim, Jong-Pil
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.50 no.1
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    • pp.31-38
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    • 2022
  • TR module using in satellite must consider discriminative electrical and mechanical requirements compare to the one using in ground and aircraft system since not only the environment level of vibration and shock during the launch stage but also the level of radiation, vacuum and thermal variation from orbit environment are more severe than atmosphere condition. This paper describes the environmental conditions of launch and the orbit and, suggests design method of TR module applying GaN to satisfy the unique environmental requirements of satellite systems by especially focusing on parts selection, derating design, RF budget design, manufacturing process design, and thermal design of TR module.