• 제목/요약/키워드: four-point probe

검색결과 243건 처리시간 0.028초

습식 식각에 의한 실리콘 웨이퍼의 표면 및 전기적 특성변화(1) - 불산 농도에 따른 표면형상 변화 - (Change of Surface and Electrical Characteristics of Silicon Wafer by Wet Etching(1) - Surface Morphology Changes as a Function of HF Concentration -)

  • 김준우;강동수;이현용;이상현;고성우;노재승
    • 한국재료학회지
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    • 제23권6호
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    • pp.316-321
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    • 2013
  • The electrical properties and surface morphology changes of a silicon wafer as a function of the HF concentration as the wafer is etched were studied. The HF concentrations were 28, 30, 32, 34, and 36 wt%. The surface morphology changes of the silicon wafer were measured by an SEM ($80^{\circ}$ tilted at ${\times}200$) and the resistivity was measured by assessing the surface resistance using a four-point probe method. The etching rate increased as the HF concentration increased. The maximum etching rate 27.31 ${\mu}m/min$ was achieved at an HF concentration of 36 wt%. A concave wave formed on the wafer after the wet etching process. The size of the wave was largest and the resistivity reached 7.54 $ohm{\cdot}cm$ at an 30 wt% of HF concentration. At an HF concentration of 30 wt%, therefore, a silicon wafer should have good joining strength with a metal backing as well as good electrical properties.

Gettering을 이용한 태양전지용 고품위 실리콘 기판 제작 (Fabrication of high-quality silicon wafers by gettering process)

  • 박효민;탁성주;강민구;박성은;이승훈;김동환
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2009년도 추계학술대회 논문집
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    • pp.366-366
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    • 2009
  • 후면접합 태양전지는 상용 태양전지의 수평전류 손실(lateral current loss) 이 없으며, 전면전극에 의해 발생하는 그림자 손실(shading loss) 줄인 고효율 태양전지의 하나이다. 생성된 반송자가 후면에 위치한 전극에서 수집되기 때문에 효율향상을 위해서는 불순물에 의한 재결합을 줄이는 것이 중요하다. 따라서 Gettering 은 높은 소수반송자 수명(life-time)을 가지는 고품위 실리콘 기판은 고효율 실리콘태양전지 제작을 위한 중요 요소 기술이다. 본 연구에서는 n-type c-Si 기판을 이용한 고효율 실리콘 이종접합 태양전지제작을 위해 external gettering 공정을 이용하여 고품위 실리콘 기판을 제작하였다. POC13 doping process 의 온도, 시간을 변화시킴으로써 이에 따른 변화를 관찰하였다. 주사전자현미경(SEM)를 통해 etch pit 을 확인 했으며,Four point probe 를 통해 면저항을 측정, 인(P)의 농도를 계산 하였다. 계산된 면저항을 통해 인(P)의 확산 깊이를 계산하였다. Iodine passivation 된 시편을 Qusi-steady state photoconductance (QSSPC)를 이용하여 소수반송자 수명을 측정함으로써 gettering 에 의한 bulk lifetime 향상 효과를 관찰하였다.

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RF 혼용 DC 스퍼터링 공정으로 증착된 ITO 박막 특성 및 유기태양전지 응용 연구

  • 임경아;정성훈;강재욱;김종국;김도근
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.389-389
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    • 2011
  • Transparent conductive oxide (TCO) 박막은 디스플레이 및 태양전지 등 광범위한 분야에서 적용되고 있으며, 특히 indium tin oxide (ITO)는 낮은 전기적 저항과 우수한 광투과도를 가지고 있어서 이미 많은 분야에 적용되고 있다. 본 연구는 RF와 DC를 혼용한 마그네트론 스퍼터링 공정을 활용하여 ITO 박막 특성 및 이를 활용한 유기태양전지 적용에 관한 것이다. UV-O3 처리된 glass 기판위에 thermal evaporation 방식으로 밀착력을 높이기 위하여 Cr을 5 nm 두께로 증착한 후 Al을 95 nm 증착하였다. 그 위에 스퍼터링 공정으로 ITO 박막을 In2O3:SnO2 target (10wt% SnO2)을 사용하여 1.0 mTorr의 공정압력(Ar:O2=30:1), 50W의 RF power 및 0.11kW의 DC power에서 50~250 nm의 두께로 증착하였다. ITO 박막의 결정구조 및 표면 형상은 x-ray diffraction (XRD) 및 scanning electron microscope (SEM)을 사용하여 분석하였으며, 전기적 특성은 four-point probe법으로 비저항값을 측정하였다. 또한 높은 광변환효율을 가지는 태양전지 제작을 위하여, 다양한 두께의 ITO 박막을 사용하여 ITO/ZnO/P3HT:PCBM/PEDOT/Ag 구조의 유기태양전지를 제작하여 소자 특성을 최적화 하였다.

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코발트/니켈 합금박막으로부터 형성된 복합실리사이드 (Characterization of Composite Silicide Obtained from NiCo-Alloy Films)

  • 송오성;정성희;김득중
    • 한국재료학회지
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    • 제14권12호
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    • pp.846-850
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    • 2004
  • NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.

구리 박막의 표면형상과 물성에 대한 전류밀도 영향 (Property and Surface Morphology of Copper Foil on the Current Density)

  • 우태규;박일송;정광희;설경원
    • 한국재료학회지
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    • 제20권10호
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    • pp.555-558
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    • 2010
  • This study examined the effect of current density on the surface morphology and physical properties of copper plated on a polyimide (PI) film. The morphology, crystal structure, and electric characteristics of the electrodeposited copper foil were examined by scanning electron microscopy, X-ray diffraction, and a four-point probe, respectively. The surface roughness, crystal growth orientation and resistivity was controlled using current density. Large particles were observed on the surface of the copper layer electroplated onto a current density of 25 mA/$cm^2$. However, a uniform surface and lower resistivity were obtained with a current density of 10 mA/$cm^2$. One of the important properties of FCCL is the flexibility of the copper foil. High flexibility of FCCL was obtained at a low current density rather than a high current density. Moreover, a reasonable current density is 20 mA/$cm^2$ considering the productivity and mechanical properties of copper foil.

고품질 3-Aminopropyltriethoxysilane 자기조립단분자막을 이용한 고전도도 Poly(3,4-ethylenedioxythiophene) 전극박막의 개발 (Development of Highly Conductive Poly(3,4-ethylenedioxythiophene) Thin Film using High Quality 3-Aminopropyltriethoxysilane Self-Assembled Monolayer)

  • 최상일;김원대;김성수
    • 통합자연과학논문집
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    • 제4권4호
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    • pp.294-297
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    • 2011
  • Quality of PEDOT electrode thin film vapor phase-polymerized on 3-aminopropyltriethoxysilane (APS) self-assembled monolayer (SAM) is very crucial for making an ohmic contact between electrode and semiconductor layer of an organic transistor. In order to improve the quality of PEDOT film, the quality of APS-SAM laying underneath the film must be in the best condition. In this study, in order to improve the quality of APS-SAM, the monolayer was self-assembled on $SiO_2$ surface by a dip-coating method under strictly controlled relative humidity (< 18%RH). The quality of APS-SAM and PEDOT thin film were investigated with a contact angle analyzer, AFM, FE-SEM, and four-point probe. The investigation showed that a PEDOT film grown on the humidity-controlled SAM is very smooth and compact (sheet resistivity = 20.2 Ohm/sq) while a film grown under the uncontrolled condition is nearly amorphous and contains quite many pores (sheet resistivity = 200 Ohm/sq). Therefore, this study clearly proves that a highly improved quality of APSSAM can offer a highly conductive PEDOT electrode thin film on it.

대향 타겟식 스퍼티링법을 이용한 저저항 투명전도 다층박막의 제작 (Preparation of Low Resistivity Transparent Conductive multilayer Thin Films by The Facing Targets Sputtering)

  • 김상모;박용서
    • 반도체디스플레이기술학회지
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    • 제13권2호
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    • pp.13-16
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    • 2014
  • We prepared the ITO/Ag multilayer thin films on soda-lime glass substrate by the Facing Target Sputtering System (FTS) at room temperature. To confirm the effect of Ag layer in ITO/Ag multilayer thin films, we have prepared various range of Ag layer in its thickness and investigated prior to the setting of ITO/Ag multilayer thin films. The thickness of Ag layer was controlled by the sputtering deposition time. Properties of as-prepared samples were investigated by using a four-point probe, UV-Visual spectrometer with a spectral visual range (400 - 800 nm) and X-ray diffractometer (XRD). As a result, the transmittance of as-prepared samples turned out to be very low in the visible range due to light-scattering on the surface of thin film as the thickness of Ag layer got increased. However, reduction of phenomenon of light-reflection in visual range was observed around 20nm of Ag thickness. We prepared the ITO/Ag multilayer thin film with a resistivity of about $8{\times}10^{-5}[{\Omega}-cm]$ and a transmittance of more than 80 % at 550 nm.

Growth and Characterization of Graphene Controlled by Cooling Profile Using Near IR CVD

  • 박윤재;임영진;김진환;최현광;전민현
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.207-207
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    • 2013
  • 기존의 그래핀 성장에 관한 연구는 열화학기상증착법(Chemical vapor deposition; CVD)을 이용한다. 그래핀 성장 제어 요소로는 촉매 기판인 전이 금속[Ru, Ir, Co, Re, Pt, Pd, Ni, Cu], 기판 전처리 과정, 수소/메탄 가스 혼합비, 작업 진공 상태, 기판온도[$800{\sim}1,000^{\circ}C$, 냉각 속도 등으로 보고 되고 있다. 그래핀 성장 원리는 Cu 촉매 기판에 메탄 가스를 $1,000^{\circ}C$ 온도에서 분해해서 탄소를 고용 시킨 후 급랭하는 도중에 석출되는 탄소에 의해 그래핀 시트가 형성되는 것으로 알려져 있다. 기존의 CVD를 열원을 이용할 경우 내부 챔버에 생기는 잠열에 의해 cooling profile의 제어가 용이하지 않다. 본 연구에서는 근적외선(Near Infrared; NIR) 열원을 이용한 CVD로 챔버 내부 잠열을 최소화하고, 냉각 공정을 Natural, Linear, Convex cooling type으로 디자인해서 cooling profile 제어가 그래핀 성장에 미치는 영향을 연구 하였다. 이렇게 성장된 그래핀을 임의의 기판(SiO2, Glass, PET film) 위에 습식방법으로 전이 시킨 후, 전기적 구조적 및 광학적 특성을 면저항(four-point probe), 전계방사 주사전자현미경(Field Emission Scanning Electron Microscope; FE-SEM), 마이크로 라만 분광법(Micro Raman spectroscopy) 및 광학현미경(optical microscope), 투과도(UV/Vis spectrometer)의 측정으로 잠열이 최소화된 NIR-CVD에서 cooling profile에 따른 그래핀 성장을 평가하였다.

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유도결합 플라즈마(ICP) Sputtering에 의한 평판 디스플레이(FPD)용 ITO 박막의 저온 증착 (Low Temperature Deposition of ITO Thin Films for Flat Panel Displays by ICP Assisted DC Magnetron Sputtering)

  • 구범모;정승재;한영훈;이정중;주정훈
    • 한국표면공학회지
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    • 제37권3호
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    • pp.146-151
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    • 2004
  • Indium tin oxide (ITO) is widely used to make a transparent conducting film for various display devices and opto-electric devices. In this study, ITO films on glass substrate were fabricated by inductively coupled plasma (ICP) assisted dc magnetron sputtering. A two-turn rf coil was inserted in the process chamber between the substrate and magnetron for the generation of ICP. The substrates were not heated intentionally. Subsequent post-annealing treatment for as-deposited ITO films was not performed. Low-temperature deposition technique is required for ITO films to be used with heat sensitive plastic substrates, such as the polycarbonate and acrylic substrates used in LCD devices. The surface roughness of the ITO films is also an important feature in the application of OLEDs along with the use of a low temperature deposition technique. In order to obtain optimum ITO thin film properties at low temperature, the depositions were carried out at different condition in changing of Ar and $O_2$ gas mixtures, ICP power. The electrical, optical and structural properties of the deposited films were characterized by four-point probe, UV/VIS spectrophotometer, atomic force microscopy(AFM) and x-ray diffraction (XRD). The electrical resistivity of the films was -l0$^{-4}$ $\Omega$cm and the optical transmittance in the visible range was >85%. The surface roughness ( $R_{rms}$) was -20$\AA$.>.

니켈 실리사이드의 열안정성에 대한 실리카 상부막과 코발트 중간막의 영향 (Effect of silica top layer and Co interlayer on the thermal stability of nickel silicide)

  • 한길진;조유정;김영철;오순영;김용진;이원재;이희덕
    • 반도체디스플레이기술학회지
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    • 제4권2호
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    • pp.7-10
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    • 2005
  • [ $SiO_{2}$ ] or SiON is usually deposited and annealed after formation of silicide in real transistor fabrication processes. Nickel silicide and nickel silicide with Co interlayer were annealed at 650$^{\circ}C$ for 30 min with silica top layer in this study to investigate its thermal stability. SEM, XPS, and FPP(four point probe) were employed for the investigation. Nickel silicide with Co interlayer showed improved thermal stability. Co interlayer seems to play a key role to the stability of nickel silicide.

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