• 제목/요약/키워드: foundry

검색결과 1,762건 처리시간 0.025초

CMOS 공정을 이용한 on-chip 인덕터 모델링과 이를 이용한 Dual Band RF 수신기 설계 (On-chip Inductor Modeling in Digital CMOS technology and Dual Band RF Receiver Design using Modeled Inductor)

  • 한동옥;추성중;임지훈;최승철;이승웅;박정호
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2004년도 하계종합학술대회 논문집(1)
    • /
    • pp.221-224
    • /
    • 2004
  • This paper has researched on-chip spiral inductor in digital CMOS technology by modeling physical structure based on foundry parameter. To show the possibility of its application to RF design, we designed dual band RF front-end receiver. The simulated receiver have gain of 23/23.5 dB and noise figure of 2.8/3.36 dB at 2.45/5.25 GHz, respectively. It occupies $16mm^2$ in $0.25{\mu}m$ CMOS with 5 metal layer.

  • PDF

차단 봉이 혼과 타판 사이에 대칭으로 배치된 타의 틈새유동 수치해석 (Numerical Study on the Gap Flow of a Rudder System with Bisymmetric Blocking Bar)

  • 오정근;서대원;김효철
    • 대한조선학회논문집
    • /
    • 제46권5호
    • /
    • pp.460-470
    • /
    • 2009
  • In recent practice a half round prismatic bar has fillet welded or formed through foundry work along the centerline on rear concave surface of the horn to mitigate gap flow between fixed and movable part of the rudder system. When the gap clearance has been blocked with this practice, numerical simulations indicate that the practices are not only effective in reducing the gap flow but also in mitigating the cavitation. The blocking effects are remarkably improved when a pair of blocking bar is bisymmetrically attached with respect to centerline on the opposite convex surface of the movable part. The blocking bar could be placed on the exposed surface under maximum rudder angle. This implies that the blocking bar could be easily adopted not only in a design stage but also in a maintenance stage for mitigating rudder cavitation. In addition, the numerical simulations imply that more improvements could be anticipated through the selection of section shape of prismatic bar for gap flow blocking.

Bacterial Carotenoids를 생산하는 광합성세균 Erythrobacter longus SY-46의 분리 및 특성 (Isolation and Characteristics of Photosynthetic Bacterium, Erythrobacter longus SY-46 which Produces Bacterial Carotenoids)

  • 김윤숙;이대성;정성윤;이원재
    • 한국환경과학회지
    • /
    • 제17권4호
    • /
    • pp.469-477
    • /
    • 2008
  • The aerobic photosynthetic bacterium, which produces bacterial carotenoids was isolated and identified from coastal marine environments. This bacterium was identified by 16S rDNA sequencing and designated as Erythrobacter longus SY-46. E. longus SY-46 was Gram negative and rod shape, and the optimal culture conditions were $25^{\circ}C$, pH 7.0, and 3.0% NaCl concentration, respectively. The carbon and nitrogen sources required for the optimal growth were lactose and tryptone, respectively. Fatty acid compositions of E. longus SY-46 were $C_{18:1}$(78.32%), v-linolenic acid($C_{18:3n9.12.15c}:3.83%$), margaric acid($C_{17:0}$: 3.38%), palmitic acid($C_{16:0}$: 3.07%), and docosahexaenoic acid($C_{22:6n3}$: 2.21%). In addition, E. longus SY-46 showed the characteristic absorption peaks of bacterial carotenoids(in the region of 450 to 480 nm) and bacteriochlorophyll(770 to 772 nm). Major carotenoids of E. longus SY-46 were polyhydroxylated xanthophylls such as fucoxanthin and zeaxanthin.

CMOS 일체형 미세 기계전자시스템을 위한 집적화 공정 개발 (Chip-scale Integration Technique for a Microelectromechnical System on a CMOS Circuit)

  • 이호철
    • 한국정밀공학회지
    • /
    • 제20권5호
    • /
    • pp.218-224
    • /
    • 2003
  • This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

CONTAMINANT LEACHABILITY FROM UTILIZED WASTES IN GEOSYSTEMS

  • Inyang Hilary I.
    • 한국지하수토양환경학회:학술대회논문집
    • /
    • 한국지하수토양환경학회 2005년도 INTERNATIONAL SYMPOSIUM ON SOIL & GROUNDWATER ENVIRONMENT
    • /
    • pp.5-21
    • /
    • 2005
  • Urbanization rates of population range from about 1% in the developed countries to about 4% in developing countries. For a global population that may reach 10 billion within the next 40 years, pressure has arisen for an increase in the large-scale use of wastes and byproducts in construction. Ironically, most of the wastes that need to be recycled are generated in large cities where the need for constructed facilities to serve large population is high. Waste and recycled materials (WRM) that are used in construction are required to satisfy material strength, durability and contaminant teachability requirements. These materials exhibit a wide variety of characteristics owing to the diversity of industrial processes through which they are produced. Several laboratory-based investigations have been conducted to assess the pollution potential and load bearing capacity of materials such as petroleum-contaminated soils, coal combustion ash, flue-gas desulphurization gypsum and foundry sand. For full-scale systems, although environmental pollution potential and structural integrity of constructed facilities that incorporate WRM are interrelated, comprehensive schemes have not been developed for integrated assessment of the relevant field-scale performance factors. In this presentation, a framework for such an assessment is proposed and presented in the form of a flowchart. The proposed scheme enables economic, environmental, worker safety and engineering factors to be addressed in a number of sequential steps. Quantitative methods and test protocols that have been developed can be incorporated into the proposed scheme for assessing the feasibility of using WRM as partial or full substitutes for earthen highway materials in the field.

  • PDF

BCD 프로세스를 이용한 파워 스위칭 센서 IC의 제작과 특성 연구 (Electrical Characteristics of Power Switching Sensor IC fabricated in Bipolar-CMOS-DMOS Process)

  • 김선정
    • 전기전자학회논문지
    • /
    • 제20권4호
    • /
    • pp.428-431
    • /
    • 2016
  • 현재 바이폴러만의 프로세스(bipolar only process)로 사용되는 전력반도체는 대부분의 반도체 생산업체에서 제공하는 Bipolar-CMOS-DMOS(BCD) 프로세스를 사용함으로써 하나의 웨이퍼에 여러 IP와 기존 IC들을 융합하여 복합칩으로 구현하고자 한다. 이번 연구에서는 보편적으로 사용되는 IP인 레귤레이터(regulator)와 연산 증폭기를 바이폴러만의 프로세스에서 BCD 프로세스로 구현하였다. 이를 사용한 간단한 응용으로 파워 스위칭 센서 IC를 설계하여 실리콘 칩에서 검증하였다. 검증 결과로 시뮬레이션과 작동 테스트가 잘 일치하고 있음을 확인할 수 있었다.

A Trapping Behavior of GaN on Diamond HEMTs for Next Generation 5G Base Station and SSPA Radar Application

  • Lee, Won Sang;Kim, John;Lee, Kyung-Won;Jin, Hyung-Suk;Kim, Sang-Keun;Kang, Youn-Duk;Na, Hyung-Gi
    • International Journal of Internet, Broadcasting and Communication
    • /
    • 제12권2호
    • /
    • pp.30-36
    • /
    • 2020
  • We demonstrated a successful fabrication of 4" Gallium Nitride (GaN)/Diamond High Electron Mobility Transistors (HEMTs) incorporated with Inner Slot Via Hole process. We made in manufacturing technology of 4" GaN/Diamond HEMT wafers in a compound semiconductor foundry since reported [1]. Wafer thickness uniformity and wafer flatness of starting GaN/Diamond wafers have improved greatly, which contributed to improved processing yield. By optimizing Laser drilling techniques, we successfully demonstrated a through-substrate-via process, which is last hurdle in GaN/Diamond manufacturing technology. To fully exploit Diamond's superior thermal property for GaN HEMT devices, we include Aluminum Nitride (AlN) barrier in epitaxial layer structure, in addition to conventional Aluminum Gallium Nitride (AlGaN) barrier layer. The current collapse revealed very stable up to Vds = 90 V. The trapping behaviors were measured Emission Microscope (EMMI). The traps are located in interface between Silicon Nitride (SiN) passivation layer and GaN cap layer.

다이케스팅 이형재 분사 로봇시스템의 터빈 모듈 설계에 관한 연구 (Study of Turbine Module Design for Die Casting Mold Release Injection Robot System)

  • 최현진;손영범;박철우;이승용;최성대
    • 한국기계가공학회지
    • /
    • 제14권5호
    • /
    • pp.1-7
    • /
    • 2015
  • Cleaning by injecting dry ice and water is a generally adopted trend these days to clean molds (injection, diecasting foundry, press, rubber mold, etc). This cleaning method is performed manually, or by installing multiple high pressure spray nozzles. We have manufactured a turbine cleaning module device that is able to clean diecasting modules at any position and angle in the space by mounting an articulated robot instead of the existing pipe type injection nozzle, to minimize lead time and enhance working yield of the cleaning process. In this paper, we analyzed process factors that are required to design the turbine module by reviewing number of revolution, and results according to different blade angles and thicknesses of the mold release injection turbine module, using computational fiuid dynamics (CFD).

주물 산업의 수익력 극대화를 위한 관리부문의 TPI 최적화 연구 (An Optimization Study on Maximizing the Earning Power of Casting Industry for Management through TPI)

  • 강병노;이창호
    • 대한안전경영과학회지
    • /
    • 제16권3호
    • /
    • pp.327-333
    • /
    • 2014
  • Changes in the business environment in which intense and sustained growth and survival must meet a variety of customer needs (Q, C, D) and business side of the enterprise for profit structure reformation is absolutely necessary for innovation activities. So far, management of innovation in method BPR, PI, OVA, 6 Sigma, Strategic Purchasing, PPM, SCM etc. are being introduced. However, they have a limit of partial optimization and improvement-oriented techniques. So this paper studied the TPI(Total Profit Innovation) application in order to derive empirical methodology to maximize profitability for the domestic S foundry factory. To this end, long-term gains through structural analysis and intensity analysis to ensure continued growth and profitability strategy are devised through management Innovation analysis. And improvement projects was presented to solve main issues of five categories(Inventory, Sales Mix, Cost, Quality Cost, Skill and Work-load) We will expect the office productivity improvement and financial performance improvement and then continually accumulate and review the results.

Frequency Response Estimation of 1.3 ㎛ Waveguide Integrated Vertical PIN Type Ge-on-Si Photodetector Based on the Analysis of Fringing Field in Intrinsic Region

  • Seo, Dongjun;Kwon, Won-Bae;Kim, Sung Chang;Park, Chang-Soo
    • Current Optics and Photonics
    • /
    • 제3권6호
    • /
    • pp.510-515
    • /
    • 2019
  • In this paper, we introduce a 1.3-㎛ 25-GHz waveguide-integrated vertical PIN type Ge-on-Si photodetector fabricated using a multi-project wafers service based on fringing field analysis in the depletion region. In general, 1.3-㎛ photodetectors fabricated using a commercial foundry service can achieve limited bandwidths because a significant amount of photo-generated carriers are located within a few microns from the input along the device length, and they are influenced by the fringing field, leading to a longer transit time. To estimate the response time, we calculate the fringing field in that region and the transit time using the drift velocity caused by the field. Finally, we compare the estimated value with the measured one. The photodetector fabricated has a bandwidth of 20.75 GHz at -1 V with an estimation error of <3 GHz and dark current and responsivity of 110 nA and 0.704 A/W, respectively.