• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.177-180
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• 2003

초 박형 실리콘 칩을 이용하여 실리콘 칩들을 포함한 모듈 전체가 굽힘이 자유로운 유연 패키징 기술을 구현하였으며 bending test와 FEA를 통해 초 박형 실리콘 칩의 기계적 특성을 살펴보았다. 초 박형 실리콘칩$(t<30{\mu}m)$은 표면손상의 가능성을 배제하기 위해 화학적 thinning 방법을 이용하여 제작되었으며 열압착 방식에 의해 $Kapton^{(R)}$에 바로 실장 되었다. 실리콘칩과 $Kapton^{(R)}$ 기판간의 단차가 적기 때문에 전기도금 방식으로 전기적 결선을 이룰 수 있었다. 이러한 방식의 패키징은 이러한 공정은 flip chip 공정에 비해 공정 간단하고 wire 본딩과 달리 표면 단차 적다. 따라서 연성회로 기관을 비롯한 인쇄회로기판의 표면뿐만 아니라 기판 자체에 삽임이 가능하여 패키징 밀도 증가를 기대할 수 있으며 실질적인 실장 가능면적을 극대화 할 수 있다.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.165-180
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• 2004

Phosphor contents are critical to the interfacial reaction and IMC behavior. - If content is too low, the dissolution rate will be very fast. - If content is too much, the cracks during interfacial reaction and the IMCs spalling will easily occur. The spalling of IMCs caused the brittle fracture of solder joint under shear test. IMCs from chemical reaction influences to the mechanical properties and life time. Composition changes from chemical reaction influence to the life time.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.79-92
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• 2004

RoHS compliant products are now being mass-produced. Eco-product(Pb-free+RoHS compliant+Halogen-free) will be possible from 2005. Pb-free flip chip will be qualified by 2004. 4Q. Lead Finish: SnBi-Under mass production Pd PPF-Under small production Matte Sn-will be internally qualified by 2004. 4Q Development of Pb-free Solder Ball: Stable Supply, Cost Down.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.49-54
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• 2001

This paper presents several UBM (Under Bump Metallurgy) systems which are currently used for wafer level solder bumping technology. The advantages and disadvantages of each UBM are summarized from the point of view of process compatability and interface morphological stability.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.09a
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• pp.183-199
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• 2002

Reliability.The reliability strongly depended on the CTE of underfill resin..The fractured portion was identical with the maximum plastic equivalent strain..1 % or less value of the maximum plastic equivalent strain certified more than 1000 cycle of TCT life. UFB.Bonding accuracy was confirmed within2$2{\mu}{\textrm}{m}$..The fundamental bondability of UFB was confirmed with no damage around aluminum pads. Some dislocations and vacancies were observed at the interface, however, the atomic level bonding was confirmed. CBB.Dry process was applied to UBM removal.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.47-53
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• 2019

Stiffness-gradient stretchable electronic packages of the soft PDMS/hard PDMS/PTFE structure were processed using the polydimethylsiloxane (PDMS) as the base substrate and the more stiff polytetrafluoroethylene (PTFE) as the island substrate, and their stretchable deformation-resistance characteristics were characterized. The flip-chip joints, formed by bonding the chip bumps of 50 ㎛-diameter onto the PDMS/PTFE substrate pads, exhibited an average contact resistance of 96 mΩ. When the stretchable package of the soft PDMS/hard PDMS/PTFE structure was deformed to 30% elongation, the strain on the PTFE was restrained to 1%, resulting in a negligible resistance increase of 1% in the daisy-chain circuit formed on the PTFE island substrate. The circuit resistance increased for 1.7% after 2,500 cycles of 0~30% stretchable deformation.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.09a
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• pp.121-145
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• 2001

Chip Size Packages (CSP) are now widely used in high speed DRAM. The major driving farce of CSP development is its superior electrical performance than that of conventional package. However, the power dissipation of high speed DRAM like DDR or RAMBUS DRAM chip reaches up to near 2W. This fact makes the thermal management methods in DRAM package be more carefully considered. In this study, the thermal performances of 3 type CSPs named $\mu-BGA$^{TM}$$ $UltraCSP^{TM}$ and OmegaCSP$^{TM}$ were measured under the JEDEC specifications and their thermal characteristics were of a simulation model utilizing CFD and FEM code. The results show that there is a good agreement between the simulation and measurement within Max. 10% of $\circledM_{ja}$. And they show the wafer level CSPs have a superior thermal performance than that of $\mu-BGA.$ Especially the analysis results show that the thermal performance of wafer level CSPs are excellent fur modulo level in real operational mode without any heat sink.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.1
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• pp.7-13
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• 2011

According to increasing of data transfer rate, printed circuit board (PCB) is required improvement of transmission speed. Optical PCB and its packaging technology can be one of the solutions that overcome the limitations of conventional electrical PCB. The data transmission capacity will be increased 10 Tbps at 2015. To this end, studies on various OPCB technologies are being conducted. For cost-effective and high- performance OPCB, studies of optical coupling by polymer replication process are conducted. In this work, optical waveguide and optical fiber array block were sequentially fabricated by polymer pattern replication method. Using this method we successfully demonstrate low loss optical fiber coupling between optical waveguide and optical fiber arrays. And researches on flip chip bonding process and using electro-optic connectors for packaging are conducted.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.4 s.37
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• pp.315-321
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• 2005

Chip-on-glass technology to attach IC chip directly on the glass substrate of flat panel display was studied by using induction heating body in AC magnetic field. With applying magnetic field of 230 Oe at 14 kHz, the temperature of an induction heating body made with Cu electrodeposited film of 5 mm${\times}$5 mm size and $600{\mu}m$ thickness reached to $250^{\circ}C$ within 60 seconds. However, the temperature of the glass substrate was maintained below $100^{\circ}C$ at a distance larger than 2 mm from the Cu induction heating body. COG bonding was successfully accomplished with reflow of Sn-3.5Ag solder bumps by applying magnetic field of 230 Oe at 14 kHz for 120 seconds to a Cu induction heating body of 5mm${\times}$5mm size and $600{\mu}m$ thickness.