• 제목/요약/키워드: flip

검색결과 888건 처리시간 0.026초

몰딩공정을 응용한 플립칩 언더필 연구 (Studies on Flip Chip Underfill Process by using Molding System)

  • 한세진;정철화;차재원;서화일;김광선
    • 반도체디스플레이기술학회지
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    • 제1권1호
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    • pp.29-33
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    • 2002
  • In the flip-chip process, the problem like electric defect or fatigue crack caused by the difference of CTE, between chip and substrate board had occurred. Underfill of flip chip to overcome this defects is noticed as important work developing in whole reliability of chip by protecting the chip against the external shock. In this paper, we introduce the underfill methods using mold and plunge and improvement of process and reliability, and the advantage which can be taken from embodiment of device.

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Low Temperature Flip Chip Bonding Process

  • Kim, Young-Ho
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.253-257
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    • 2003
  • The low temperature flip chip technique is applied to the package of the temperature-sensitive devices for LCD systems and image sensors since the high temperature process degrades the polymer materials in their devices. We will introduce the various low temperature flip chip bonding techniques; a conventional flip chip technique using eutectic Bi-Sn (mp: $138^{\circ}C$) or eutectic In-Ag (mp: $141^{\circ}C$) solders, a direct bump-to-bump bonding technique using solder bumps, and a low temperature bonding technique using low temperature solder pads.

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FUZZY FLIP-FLOP CIRCUIT AND ITS APPLICATION

  • Ozawa, Kazuhiro;Hirota, Kaoru
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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    • pp.925-928
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    • 1993
  • In this paper the caracteristics of the fuzzy flip-flop which was proposed as a fuzzy sequential circuit is firstly mentioned. Secondly the circuit construction of typical fuzzy flip-flip circuits using VHDL (Very high speed integrated circuit Hardware Description Language) compiler and simulator is presented. Finally the possibility of the application of the fuzzy sequential circuit will be mentioned.

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위상대조도 MRI에서 숙임각에 따른 상행대동맥의 혈류 측정 (Blood Flow Measurement with Phase Contrast MRI According to Flip Angle in the Ascending Aorta)

  • 김문선;권대철
    • 한국자기학회지
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    • 제26권4호
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    • pp.142-148
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    • 2016
  • 자기공명영상에서 위상대조(phase contrast; PC) 기법으로 혈류 속도와 혈류량을 정량적으로 측정하기 위해 VENC(150 cm/s)에서 숙임각의 변화에 따른 혈류 속도와 혈류량을 측정하였다. 1.5T MRI로 지원자 17명(여: 8, 남: 9, 평균연령 $57.9{\pm}15.4$)을 대상으로 non-breath holding 기법을 적용하여 상행대동맥에서 VENC(150 cm/s)로 숙임각을 $20^{\circ}$, $30^{\circ}$, $40^{\circ}$ 변화하여 측정하였다. 혈류는 average velocity, peak velocity, net forward volume, net forward volume/body surface area를 획득하였다. 상행대동맥에서 AV(average velocity)의 평균값은 숙임각 $20^{\circ}$(9.87 cm/s), $30^{\circ}$(9.6 cm/s), $40^{\circ}$(10.05 cm/s)로 측정되었다. 숙임각을 $20^{\circ}$, $30^{\circ}$, $40^{\circ}$에서 peak velocity, average velocity, net forward volume, net forward volume/body surface area는 통계적인 유의한 차이가 없었다(p > .05). 혈류속도와 혈류량 측정은 매개변수를 조정하여 적용하면 심장혈관 질환의 진단 및 치료에 중요한 정보가 되는 혈류량을 정확히 계산하고, 혈류량 측정에 관한 연구에 도움을 줄 수 있다.

The Influence of Flip-flops Gait on the Muscle Activity of Tibilalis anterior and Gastrocnemius

  • Choi, Jung Hyun;Song, Mi Ri;Lee, Joong Hyun;Kim, Hong Rae;Park, Si Eun;Kim, Ji Sung;Kwak, Dae Young;Lee, Sang Bin;Kim, Nyeon Jun;Koo, Ja Pung;Kim, Soon Hee
    • 국제물리치료학회지
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    • 제4권2호
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    • pp.562-565
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    • 2013
  • The fact that flip-flops, one of many different types of unstable shoes, are light and relatively easy to put on, accounts for their popularity among people. But because flip-flops rely heavily on the support of a single thong between your first and second toes, they impose a huge amount of pressure onto lower leg. Thus in the following experiment we tried to examine the different effects of flip-flops and running shoes in terms of their effect on muscle activity and fatigue of tibialis anterior and gastrocnemius during walking. In order to measure an electromyogram we used Free EMG system. 10 men and 10 women in running shoes ran on treadmills for 15 minutes at 4.8km/h, 2 days later the same experiment was carried out, but this time, in flip-flops. p value turned out to be greater than .05 and thus there was no considerable difference between the effects of flip-flops and running shoes on muscle activity and fatigue during walking. Therefore we conclude that despite the fact that flip-flops are considered unstable, their effects on muscle activity and fatigue of tibialis anterior and gastrocnemius are negligible.

Critical Cleaning Requirements for Flip Chip Packages

  • Bixenman, Mike;Miller, Erik
    • 마이크로전자및패키징학회지
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    • 제7권1호
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    • pp.61-73
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    • 2000
  • In traditional electronic packages the die and the substrate are interconnected with fine wire. Wire bonding technology is limited to bond pads around the peripheral of the die. As the demand for I/O increases, there will be limitations with wire bonding technology.

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플립 칩의 기하학적 형상과 구성재료의 변화에 따른 효과 (Effect by Change of Geometries and Material Properties for Flip-Chip)

  • 권용수;최성렬
    • 한국산업융합학회 논문집
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    • 제3권1호
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    • pp.69-75
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    • 2000
  • Multichip packages are comprised of dissimilar materials which expand at different rates on heating. The differential expansion must be accommodated by the various structural elements of the package. A types of heat exposures occur operation cycles. This study presents a finite element analysis simulation of flip-chip among multichip. The effects of geometries and material properties on the reliability were estimated during the analysis of temperature and thermal stress of flip-chip. From the results, it could be obtained that the more significant parameters to the reliability of flip-chip arc chip power cycle, heat convection and height of solder bump.

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60 GHz 대역 신호 무결성을 위한 플립 칩 구조 최적화 (Optimization of a Flip-Chip Transition for Signal Integrity at 60-GHz Band)

  • 감동근
    • 한국전자파학회논문지
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    • 제25권4호
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    • pp.483-486
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    • 2014
  • 일반적으로 플립 칩은 와이어 본딩에 비해 신호 무결성을 저해하는 기생 성분이 작지만, 60 GHz 대역에서는 설계하기에 따라서 2 dB 이상의 삽입 손실 차이가 난다. 본 논문에서는 플립 칩 구조의 여러 설계 변수들에 따라 삽입 손실이 어떻게 변하는 지를 분석함으로써 설계를 최적화하는 방법을 제시한다.