• The Journal of Korean Institute of Communications and Information Sciences
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• v.10 no.1
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• pp.38-41
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• 1985

The hybrid design which is to take IIR filter of the first stage as a second order pole-zero model and minimize the filter length of the of the FIR filter of the following stage is presented. The outcome of the simulation showed us that the the filter length in the hybrid filters was remarkably decreased compared to that of the hybrid filters which take the IIR filter as a all-pole model. Although the hybrid filters couldn't obtain the exact linear phase. it was superior to the IIR filters in passband and stopband.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.1
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• pp.150-158
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• 2010

Filtering is necessary for the SRC(sample rate converter), that is used to change the sampling rate of a digital signal. The larger the conversion ratio of the sampling rate becomes, the more signal processing is needed for the filter, which means more complexity on realization. Thus it is important to reduce the amount of signal processing for the case of substantial conversion ratios. In this paper it is presented an efficient design method of a multistage FIR(finite impulse response) filter, with which the rate conversion occurs in stages rather than in one step. In this method, filter searching is performed exhaustively over all possible factorization of the conversion ratio, and also the filter complexity is measured based on direct realization rather than on estimation. It has been shown a designed multistage filter to have a less number of multiplications for filtering operation in comparison with a conventionally designed one. It has also been found that by allowing some variations of the filter architecture such as a halfband filter or a filter with multiple transition bands, the number of multiplications can be reduced further.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.758-761
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• 2007

Digital signal processing technique is applied in wide fields such as speech processing, image processing and spectrum analysis. Therefore, in order to do frequency selective operation digital filter is used in stead of analog filter and sharp filter characteristics can be implemented. Since finite impulse response (FIR) digital filter as nonrecursive type represents linear phase response characteristics and is always stable and is used in fields regarding wave information importantly such as data transmission. And due to frequency characteristics, in order to remove the Gibbs phenomenon generating around a discontinuous point, filter is designed through window function method. Therefore, in this paper to improve performance of FIR digital filter, a modified window function was applied. And the proposed method was compared with conventional methods using peak side-lobe and transition properties in simulations.

• Journal of IKEEE
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• v.19 no.3
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• pp.342-348
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• 2015

High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.

• Journal of Broadcast Engineering
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• v.17 no.3
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• pp.480-490
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• 2012

When interpolating chrominance signal, the H.264/AVC standard uses linear interpolation. In this paper, we suggest more effective method that uses a high precision filter, 6-tap FIR filter, 2-tap linear filter for chroma interpolation. The experimental result shows that the proposed method achieves the BD-Rate decrease without the PSNR decrease compared with Jm11.0kta2.7. The maximum BD-rate improvements on Y component are 1.3%, those of Cb and Cr components are 19.8%, 25.0%, respectively. The average BD-rate improvements on Y component are 0.5%, those of Cb and Cr components are 6.1%, 6.9%, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.12
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• pp.2458-2467
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• 1994

This paper proposes a new design method for obtaining the impulse responses which satisfy the prescribed conditions designing for maximally flat FIR lowpass filters and highpass filters. The bandpass filters and band-reject filters have been directly derived from the addition and subtraction of impulse responses of a lowpass filter and a highpass filter. The two-dimensional maximally flat FIR lowpass filter, highpass filters, bandpass filters and band-reject filters with zero-phase have been designed by transforming the impulses of the one-dimensional filters designed in this research, which do not destroy lines and edges at the image signal processing.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.63-73
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• 1999

This paper presents new pipeline architecure for low power and high speed digital FIR filters. The proposed architecture based on retiming technique achieves enhancement on speed by sharing the input delay stage with multiplication of input data and on power combined with supply voltage scaling down technique. An 8-tap digital FIR filter for PRML disk-drive read channels adopting the proposed pipeline architecture has been designed and fabricated with 0.8${\mu}m$ CMOS double metal process technology. Measured results show that the designed FIR filter operates to 192 MHz in average and dissipates 1.22 mW/MHz at 3.3.V power supply. As a result, the proposed architecture improves speed by about 16% and reduces power dissipation by about 23% when operating at the same throughput.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.2
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• pp.159-164
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• 2004

This paper proposes a new digital filter implementation which adopts an identical structure at both behavioral and logic level in top-down design. This methodology is based on the observation that multiplication is a form of convolution and carrying, and therefore multiplication is implemented with the same structure as that of a convolution in a recursive manner at the logic level. In order to demonstrate a recursive structure-based FIR digital filter, we select L-tap transposed and systolic FIR filters, and implement them to have a single structure. The proposed filter design becomes regular and modular because of the recursive adoption of a single structure for convolutions, and is very compact in that it needs only two 1-bit I/O ports in addition to significant improvement on hardware complexity without time penalty on the output sequence.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.217-226
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• 1986

A method on the hardware implementation of the Multi-channel FIR digital filter using Digital Quarter Square Multiplication(DQSM) algorithm is proposed. This paper describes that ROM requirement can be reduced by using the double precision algorithm and the absolute value circuit, and also execution speed can be improved by reducing logic level steps of absolute value circuit. The frequency response of the four channel FIR digital filter implemented by the above method is quite agreeable with the frequency response simulated by Remez excahange algorithm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.649-651
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• 2016

본 연구에서는 디지털 신호에 포함되어 있는 잡음을 효과적으로 제거하기 위한 방법으로 프로그램 가능한 디지털 FIR 필터를 제안한다. 이러한 필터는 Altera의 FPGA(Field Programmable Gate Array)인 cyclone II EP2C70F89618를 이용하여 설계하고 구현하였다. 데이터 신호 잡음 제거 알고리즘을 바탕으로 한 영상 신호 제거 결과는 출력 영상으로부터 알 수 있듯이 필터 적용 후 출력 영상은 적용 전의 출력 영상에 비해 월등히 구분이 가능한 출력 영상 특성을 보임을 확인하였다.