• 제목/요약/키워드: ferroelectric memory

검색결과 241건 처리시간 0.034초

Recent Development in Polymer Ferroelectric Field Effect Transistor Memory

  • Park, Youn-Jung;Jeong, Hee-June;Chang, Ji-Youn;Kang, Seok-Ju;Park, Cheol-Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권1호
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    • pp.51-65
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    • 2008
  • The article presents the recent research development in polymer ferroelectric non-volatile memory. A brief overview is given of the history of ferroelectric memory and device architectures based on inorganic ferroelectric materials. Particular emphasis is made on device elements such as metal/ferroelectric/metal type capacitor, metal-ferroelectric-insulator-semiconductor (MFIS) and ferroelectric field effect transistor (FeFET) with ferroelectric poly(vinylidene fluoride) (PVDF) and its copolymers with trifluoroethylene (TrFE). In addition, various material and process issues for realization of polymer ferroelectric non-volatile memory are discussed, including the control of crystal polymorphs, film thickness, crystallization and crystal orientation and the unconventional patterning techniques.

Nonvolatile Ferroelectric Memory Devices Based on Black Phosphorus Nanosheet Field-Effect Transistors

  • 이효선;이윤재;함소라;이영택;황도경;최원국
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.281.2-281.2
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    • 2016
  • Two-dimensional van der Waals (2D vdWs) materials have been extensively studied for future electronics and materials sciences due to their unique properties. Among them, black phosphorous (BP) has shown infinite potential for various device applications because of its high mobility and direct narrow band gap (~0.3 eV). In this work, we demonstrate a few-nm thick BP-based nonvolatile memory devices with an well-known poly(vinylidenefluoride-trifluoroethylene) [P(VDF-TrFE)] ferroelectric polymer gate insulator. Our BP ferroelectric memory devices show the highest linear mobility value of $1159cm^2/Vs$ with a $10^3$ on/off current ratio in our knowledge. Moreover, we successfully fabricate the ferroelectric complementary metal-oxide-semiconductor (CMOS) memory inverter circuits, combined with an n-type $MoS_2$ nanosheet transistor. Our memory CMOS inverter circuits show clear memory properties with a high output voltage memory efficiency of 95%. We thus conclude that the results of our ferroelectric memory devices exhibit promising perspectives for the future of 2D nanoelectronics and material science. More and advanced details will be discussed in the meeting.

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Tapering과 Ferroelectric Polarization에 의한 3D NAND Flash Memory의 Lateral Charge Migration 분석 (The Analysis of Lateral Charge Migration at 3D-NAND Flash Memory by Tapering and Ferroelectric Polarization)

  • 이재우;이종원;강명곤
    • 전기전자학회논문지
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    • 제25권4호
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    • pp.770-773
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    • 2021
  • 본 논문에서는 tapering과 ferroelectric(HfO2)구조가 적용된 3D NAND flash memory의 프로그램 이후 시간경과에 따른 retention특징을 분석했다. Nitride에 trap된 전자는 시간이 지남에 따라 lateral charge migration이 발생한다. 프로그램 이후 시간이 지남에 따라 trap된 전자가 tapering에 의해 두꺼워진 채널 쪽으로 lateral charge migration이 더 많이 발생하는 것을 확인했다. 또한 Oxide-Nitride-Ferroelectric (ONF) 구조는 polarization에 의해 lateral charge migration이 완화되기 때문에 기존 Oxide-Nitride-Oxide (ONO) 구조 보다 문턱전압(Vth)의 변화량이 줄어든다.

Integration Process and Reliability for $SrBi_2$ $Ta_2O_9$-based Ferroelectric Memories

  • Yang, B.;Lee, S.S.;Kang, Y.M.;Noh, K.H.;Hong, S.K.;Oh, S.H.;Kang, E.Y.;Lee, S.W.;Kim, J.G.;Shu, C.W.;Seong, J.W.;Lee, C.G.;Kang, N.S.;Park, Y.J.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권3호
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    • pp.141-157
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    • 2001
  • Highly reliable packaged 64kbit ferroelectric memories with $0.8{\;}\mu\textrm{m}$ CMOS ensuring ten-year retention and imprint at 125^{\circ}C$ have been successfully developed. These superior reliabilities have resulted from steady integration schemes free from the degradation, due to layer stress and attacks of process impurities. The resent results of research and development for ferroelectric memories at Hynix Semiconductor Inc. are summarized in this invited paper.

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Feasibility of ferroelectric materials as a blocking layer in charge trap flash (CTF) memory

  • Zhang, Yong-Jie;An, Ho-Myoung;Kim, Hee-Dong;Nam, Ki-Hyun;Seo, Yu-Jeong;Kim, Tae-Geun
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.119-119
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    • 2008
  • The electrical characteristics of Metal-Ferroelectric-Nitride-Oxide-Silicon (MFNOS) structure is studied and compared to the conventional Silicon-Oixde-Nitride-Oxide-Silicon (SONOS) capacitor. The ferroelectric blocking layer is SrBiNbO (SBN with Sr/Bi ratio 1-x/2+x) with the thickness of 200 nm and is fabricated by the RF sputter. The memory windows of MFNOS and SONOS capacitors with sweep voltage from +10 V to -10 V are 6.9 V and 5.9 V, respectively. The effect of ferroelectric blocking layer and charge trapping on the memory window was discussed. The retention of MFNOS capacitor also shows the 10-years and longer retention time than that of the SONOS capacitor. The better retention properties of the MFNOS capacitor may be attributed to the charge holding effect by the polarization of ferroelectric layer.

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3D NAND Flash Memory에 Ferroelectric Material을 사용한 Current Path 개선 (Improvement of Current Path by Using Ferroelectric Material in 3D NAND Flash Memory)

  • 이지환;이재우;강명곤
    • 전기전자학회논문지
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    • 제27권4호
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    • pp.399-404
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    • 2023
  • 본 논문에서는 3D NAND Flash memory의 O/N/O(Oxide/Nitride/Oxide) 구조와 blocking oxide를 ferroelectric material로 대체한 O/N/F(Oxide/Nitride/Ferroelectric) 구조의 current path를 분석했다. O/N/O 구조는 Vread가 인가되면 neighboring cell의 E-field로 인해 current path가 channel 후면에 형성된다. 반면 O/N/F 구조는 ferroelectric material의 polarization으로 인해 electron이 channel 전면으로 이동하여 current path가 전면에 형성된다. 또한 channel thickness와 channel length에 따른 소자 특성을 분석했다. 분석 결과 O/N/F 구조의 전면 electron current density 증가는 O/N/O 구조보다 2.8배 더 높았고 O/N/F 구조의 전면 electron current density 비율이 17.7% 높았다. 따라서 O/N/O 구조보다 O/N/F 구조에서 전면 current path가 더 효과적으로 형성된다.

Ferroelectric-gate Field Effect Transistor Based Nonvolatile Memory Devices Using Silicon Nanowire Conducting Channel

  • Van, Ngoc Huynh;Lee, Jae-Hyun;Sohn, Jung-Inn;Cha, Seung-Nam;Hwang, Dong-Mok;Kim, Jong-Min;Kang, Dae-Joon
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.427-427
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    • 2012
  • Ferroelectric-gate field effect transistor based memory using a nanowire as a conducting channel offers exceptional advantages over conventional memory devices, like small cell size, low-voltage operation, low power consumption, fast programming/erase speed and non-volatility. We successfully fabricated ferroelectric nonvolatile memory devices using both n-type and p-type Si nanowires coated with organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] via a low temperature fabrication process. The devices performance was carefully characterized in terms of their electrical transport, retention time and endurance test. Our p-type Si NW ferroelectric memory devices exhibit excellent memory characteristics with a large modulation in channel conductance between ON and OFF states exceeding $10^5$; long retention time of over $5{\times}10^4$ sec and high endurance of over 105 programming cycles while maintaining ON/OFF ratio higher $10^3$. This result offers a viable way to fabricate a high performance high-density nonvolatile memory device using a low temperature fabrication processing technique, which makes it suitable for flexible electronics.

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Recent Advance of Flexible Organic Memory Device

  • Kim, Jaeyong;Hung, Tran Quang;Kim, Choongik
    • Journal of Semiconductor Engineering
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    • 제1권1호
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    • pp.38-45
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    • 2020
  • With the recent emergence of foldable electronic devices, interest in flexible organic memory is significantly growing. There are three types of flexible organic memory that have been researched so far: floating-gate (FG) memory, ferroelectric field-effect-transistor (FeFET) memory, and resistive memory. Herein, performance parameters and operation mechanisms of each type of memory device are introduced, along with a brief summarization of recent research progress in flexible organic memory.

Coherent director rotation and memory effects, and their dependence on the morphology of the constituent molecules in thiol-ene polymer stabilized ferroelectric liquid crystal system

  • Lim, Tong-Kun;Lee, Ji-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.199-202
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    • 2005
  • We have studied the origin of coherent director rotation [CDR] as well as memory behavior in thiol-ene polymer stabilized ferroelectric liquid crystal [FLC]. The ene constituents are found to be always located at the inter-layer space and induce the coherent director rotation motion of liquid crystal molecule. On the other hand, the thiols are more intersticed between ferroelectric liquid crystal molecules at intra-layer as the thiol gets longer, and these intersticed thiols enhance the multistability and the resolution of memory state of FLCs.

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Crystallinity of $Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}$ capacitors on ferroelectric properties

  • Yang, Bee-Lyong
    • 한국결정성장학회지
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    • 제12권3호
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    • pp.161-164
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    • 2002
  • Polycrystalline and epitaxial heterostructure films of $La_{0.5}Sr_{0.5}CoO_{3}/Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}/La_{0.5}Sr_{0.5}CoO_{3}$ (LSCO/PNZT/LSCO) capacitors were evaluated in terms of low voltage and high speed operation in high density memory, using TiN/Pt conducting barrier combination. Structural studies for a high density ferroelectric memory process flow, which requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack, indicate complete phase purity (i.e. fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, and high-speed characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties.