• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.6
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• pp.313-320
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• 2002

In this paper, a new current controller with fast transient response is Proposed. The basic concept is to find the optimal control voltage for tracking the reference current with minimum time under the voltage limit constraint. The generalized solution of the minimum time current control in the systems are presented in this paper. With the generalized solution, the minimum time current controller can be easily applied to all the 3-phase balanced system. Through the simulation and the experiment, it is observed that the proposed controller has much less transient time than the conventional synchronous PI regulator.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.5
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• pp.82-89
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• 2007

AVR(Automatic Voltage Regulator) of exciter control system in AC generator controls voltage and current according to load and terminal voltage variations in order to remain at the bus voltage. The output characteristics of main generator is dependent on the control performance of AVR. This paper presents the PWM type exciter system with transient response compensator for robust control of load variations. Additional transient response compensator generates compensation signal for load variation. So the proposed excitation control system has fast dynamic response in transient period and can control terminal voltage constantly. The proposed method is verified by the computer simulation and experimental results in prototype generation system.

• Nuclear Engineering and Technology
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• v.17 no.4
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• pp.256-266
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• 1985

The loss of coolant flow accident is analyzed for the pressurized water reactor of Korea Nuclear Unit-1. The loss of coolant flow accident is classified into three types in accordance with its severity; partial loss of coolant flow, complete loss of coolant flow and pump locked rotor accident. Analysis has been carried out in three stages; system transient and average core analysis, DNBR calculation and hot spot analysis. The purpose of developing KTRAN is to simulate the transient fast. For the DNBR calculation, the thermal hydraulic codes, SCAN and COBRA IV-1, are adopted. And for the hot spot analysis, the fuel thermal transient code LTRAN is employed. This code system should be fast responding to the transient analysis. In case the transient occurs, severity comes within a couple of seconds. So response should be fast to accomodate the following sequence of the accident. Unfortunately this purpose could not be achieved by KTRAN. However, the calculated results are well comparable with FSAR results in range. Thereby, the effectiveness of KTRAN code analysis in this type of accident is proven.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.

• Transactions on Electrical and Electronic Materials
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• v.17 no.3
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• pp.172-177
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• 2016

Miller feedback compensation is introduced in a low dropout regulator (LDO) in order to obtain a capacitor-free regulator and improve the fast transient response. The conventional LDO has a limited bandwidth because of the large-size output capacitor and parasitic gate capacitance in the power MOSFET. In order to obtain a stable frequency response without the output capacitor, LDO is designed with resistor-capacitor (R-C) compensation and this is achieved with a connection between the gain-stage and the power MOS. An R-C compensator is suggested to provide a pole and zero to improve the stability. The proposed LDO is designed with the 0.35 μm CMOS process. Simulation testing shows that the phase margin in the Bode plot indicates a stable response, which is over 100^o. In the load regulation, the transient time is within 55 μs when the load current changes from 0.1 to 1 mA.

• Structural Engineering and Mechanics
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• v.31 no.2
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• pp.211-223
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• 2009

Transient response analysis can be conducted either in the time domain, or via the frequency domain. Sometimes a frequency domain method (FDM) has advantages over a time domain method. A practical issue in the FDM is to find out an appropriate extended period, which may be affected by several factors, such as the excitation duration, the system damping, the artificial damping, the period of interest, etc. In this report, the extended period of the FDM based on the Duhamel's integral is investigated. This Duhamel's integral based FDM does not involve the unit impulse response function (UIRF) beyond the period of interest. Due to this fact, the ever-lasting UIRF can be simply set as zero beyond the period of interest to shorten the extended period. As a result, the preferred extended period is the summation of the period of interest and the excitation duration. This conclusion is validated by numerical examples. If the extended period is too short, then the front portion of the period of interest is more prone to errors than the rear portion, but the free vibration segment is free of the wraparound error.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2212-2220
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• 2016

Based on the conventional PID algorithm and the adaptive PID (AD-PID) algorithm, a separate sampling adaptive PID (SSA-PID) algorithm is proposed to improve the transient response of digitally controlled DC-DC converters. The SSA-PID algorithm, which can be divided into an oversampled adaptive P (AD-P) control and an adaptive ID (AD-ID) control, adopts a higher sampling frequency for AD-P control and a conventional sampling frequency for AD-ID control. In addition, it can also adaptively adjust the PID parameters (i.e. $K_p$, $K_i$ and $K_d$) based on the system state. Simulation results show that the proposed algorithm has better line transient and load transient responses than the conventional PID and AD-PID algorithms. Compared with the conventional PID and AD-PID algorithms, the experimental results based on a FPGA indicate that the recovery time of the SSA-PID algorithm is reduced by 80% and 67% separately, and that overshoot is decreased by 33% and 12% for a 700mA load step. Moreover, the SSA-PID algorithm can achieve zero overshoot during startup.

• Advances in aircraft and spacecraft science
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• v.5 no.2
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• pp.177-186
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• 2018

This paper deals with the idea to replace the usual high-level sine sweep test on shaker at system level, very severe, by a low level one completed by a transient test in the same configuration, in order to be more representative of the real environment, thus limiting over testing and improving the payload comfort. The problem of the transient test specification is first discussed. The proposed solution is to derive from LV/SC coupled analyses a shock response spectrum corresponding to two damping ratios. Then, the question of adequate shock synthesis is tackled. A new method with a given spectrum is considered for better potential and accuracy than the usual wavelets. A campaign on the Intespace bi-shaker devoted to system level showed its capability to perform the resulting test with one spectrum. First investigations to extend this approach to two spectra are in progress.

• ETRI Journal
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• v.42 no.5
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• pp.790-798
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• 2020

Herein, a low-ripple coarse-fine digital low-dropout regulator (D-LDO) without ringing in the transient state is proposed. Conventional D-LDO suffers from a ringing problem when settling the output voltage at a large load transition, which increases the settling time. The proposed D-LDO removes the ringing and reduces the settling time using an auxiliary power stage which adjusts its output current to a load current in the transient state. It also achieves a low output ripple voltage using a comparator with a complete comparison signal. The proposed D-LDO was fabricated using a 65-nm CMOS process with an area of 0.0056 μ㎡. The undershoot and overshoot were 47 mV and 23 mV, respectively, when the load current was changed from 10 mA to 100 mA within an edge time of 20 ns. The settling time decreased from 2.1 ㎲ to 130 ns and the ripple voltage was 3 mV with a quiescent current of 75 ㎂.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.11
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• pp.1071-1075
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• 2009

This article describes a robust control method by using peak control of a sensitivity function in the state-feedback control systems. This method apparently reduces the peak, and as a result makes closed loop systems more stable. The designed closed loop systems also make the response to an external step disturbance more fast with a lower undershoot. At the conclusion, it is verified that the proposed method enhances robust stability and robust performance to parametric uncertainties through $\mu$-plot.