• Journal of Institute of Control, Robotics and Systems
• /
• v.22 no.9
• /
• pp.759-765
• /
• 2016

This paper presents the principle, dynamics modeling and control, hardware implementation, and flight test result of a hybrid-type unmanned aerial vehicle (UAV). The proposed UAV was designed to provide both hovering and fixed-wing type aerodynamic flight modes. The UAV's flight mode transition was achieved through the attitude transformation in pitch axis, which avoids a complex rotor tilt mechanism from a structural and control viewpoint. To achieve this, a different navigation coordinate was introduced that avoids the gimbal lock in pitch singularity point. Attitude and guidance control algorithms were developed for the flight control system. For flight test purposes, a quadrotor attached with a tailless fixed-wing structure was manufactured. An onboard flight control computer was designed to realize the navigation and control algorithms and the UAV's performance was verified through the outdoor flight tests.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.23 no.4
• /
• pp.231-239
• /
• 2018

The phase-locked loop (PLL) is widely used in grid-tie inverter applications to achieve a synchronization between the inverter and the grid. However, its performance deteriorates when the grid voltage is not purely sinusoidal due to the harmonics and the frequency deviation. Therefore, a high-performance PLL must be designed for single-phase inverter applications to guarantee the quality of the inverter output. This paper proposes a simple method that can improve the performance of the PLL for the single-phase inverter under a non-sinusoidal grid voltage condition. The proposed PLL can accurately estimate the fundamental frequency and theta component of the grid voltage even in the presence of harmonic components. In addition, its transient response is fast enough to track a grid voltage within two cycles of the fundamental frequency. The effectiveness of the proposed PLL is confirmed through the PSIM simulation and experiments.

• Proceedings of the KIPE Conference
• /
• 2017.11a
• /
• pp.7-8
• /
• 2017

The Phase-Locked Loop (PLL) is widely used in grid-tie inverter applications to achieve the synchronization between the inverter and the grid. However, its performance is deteriorated when the grid voltage is not pure sinusoidal due to the harmonics and the frequency deviation. Therefore it is important to design a high performance phase-locked loop (PLL) for the single phase inverter applications to guarantee the quality of the inverter output. In this paper a simple method to improve the performance of the PLL for the single phase inverter is proposed. The proposed PLL is able to accurately estimate the fundamental frequency component of the grid voltage even in the presence of harmonic components. In additional its transient response is fast enough to track a change in grid voltage within two cycles of the fundamental frequency. The effectiveness of the proposed PLL is confirmed through the PSIM simulation and experiments.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.11
• /
• pp.2378-2384
• /
• 2009

A novel phase-locked loop(PLL) architecture of sub-micron locking time has been proposed. Input frequency is multiplied by using a delay-locked loop(DLL). The input frequency of a PLL is multiplied while the PLL is out of lock. The multiplied input frequency makes the PLL having a wider loop bandwidth. It has been simulated with a $0.18{\mu}m$ 1.8V CMOS process. The simulated locking time is $0.9{\mu}s$ at 162.5MHz and 2.6GHz, input and output frequency, respectively.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.2
• /
• pp.451-454
• /
• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.15 no.4
• /
• pp.335-341
• /
• 2010

The electric braking system obtains its braking force by a motor instead of the hydraulic brake which has been used in conventional automobile systems. Electric braking system is consisted of fewer numbers of components than hydraulic braking system, and it has effects of improved response and reduced braking distance for the ABS(Anti-lock Brake System) and ESC(Electronic Stability Control). This paper presents the BLAC motor drive system for Electro-Magnetic Brake(EMB). Proposed control system consists of the power converter for driving a motor and the digital control system for speed control, and the vector control is applied for fast torque response. It is verified through the simulation using Matlab/Simulink and experiment that the proposed BLAC drive system can be applied to EMB.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.12 no.4
• /
• pp.87-98
• /
• 2002

Software has been developed very fast as information has become important value. Illegal software copy has been the main problem of developing software business. Recently used protecting lock system for software copy has not guaranteed perfectly from easily cracked-defense system. This paper, therefore, proposes 96-bit block cipher with 112-bit length to replace a DES(Data Encryption Standard) algorithm. Security chip by ASIC(Application Specific Integrated Circuit) security module is presented for software copy protection. Then, an auto block protecting algorithm is designed for the security chip. Finally, controlling driver and library are built for the security chip.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.7C
• /
• pp.706-714
• /
• 2009

In this paper, we proposed a burst mode AGC loop and preamble detector applicable for VDL(VHF Digital Link) mode-2 using D8PSK modulation scheme and the performance analysis of proposed schemes is described. Generally the AGC scheme can be divided into two types, continuos and burst mode AGC. The continuos mode is performed well only with an analog feedback AGC loop. But the analog feedback AGC loop is not suitable for burst mode since its gain lock time is more than preamble duration, which causes the preamble detector misses preamble. Hence a fast digital AGC loop is required for burst mode. Also the AGC loop has to be designed with full gain during idle time to detect bursts although the signal level is very low. If the time to acquire gain lock is slow, the preamble detector fail to detect burst due to saturation of a lot of preamble samples. The receiver performance might be down even if the burst was detected because the preamble is used to estimate several parameters need to demodulation at receiver. In this paper we analysed relationships between the AGC loop and preamble detector. we present an AGC loop and preamble detector in burst mode.

• Journal of the Korean Society of Marine Environment & Safety
• /
• v.28 no.2
• /
• pp.377-384
• /
• 2022

Vortex-induced vibration (VIV) occurs owing to the vortex generated from the back side of the appendages of ships and submarines during operation. Recently, the importance of high-order modes (HOMs) vibration and fatigue failure has become increasingly emphasized by increasing the speed of ships and the size of structures. In addition, predicting the vibration of HOMs is significantly necessary as the VIV becomes stronger in the fast flow speed condition than in the low flow speed condition. This study introduces a methodology according to HOMs hybrid Fluid Structure Interaction (FSI) for predicting the HOMs VIV on the hydrofoils. The HOMs FSI system is verified by comparing the VIV results from the FSI simulation with the experimental results. Finally, the effectiveness of the HOMs FSI is determined by applying the maximum von-Mises stress obtained from the VIV on the hydrofoil to the S-N curve released from Det Norske Veritas (DNV). VIV results from the HOMs FSI include the lock-in characteristics as well as a significant increase of more than 10 times compared with that of low-order modes (LOMs) FSI. In the future works, advanced studies will be required for improving cantilever boundary conditions and the shape of hydrofoils.

• 제어로봇시스템학회:학술대회논문집
• /
• 2005.06a
• /
• pp.444-448
• /
• 2005

This paper presents a developing procedure of the CAN-based real-time simulator for car body control, aiming at replacing the actual W/H (Wiring Harness) and J/B(Junction Box) couple eventually. The CAN protocol, as one kind of field-bus communication, defines the lowest 2 layers of the ISO/OSI standard, namely, the physical layer(PL) and the data link layer(DLL), for which the CSMA/NBA protocol is generally adopted. For CPU, two PIC18Fxx8x's are used because of their built-in integration of CAN controller, large internal FLASH memory (48K or 64K), and their costs. To control J/B's and actuators, 2 controller boards are separately implemented, between which CAN lines communicate through CAN transceivers MCP255. A power motor for washing windshield, 1 door lock motor, and 6 blink lamps are chosen for actuators of the simulator for the first stage. For the software architecture, a polling method is used for the fast global response time despite its slow individual response time. To improve the individual response time and to escape from some eventual trapped-function loops, High/Low ports of the CPU are simply used, which increases the stability of the actuator modules. The experimental test shows generally satisfactory results in normal transmitting / receiving function and message trace function. This simulator based on CAN shows a promising usefulness of lighter, more reliable and intelligent distributed body control approach than the conventional W/H and J/B couple. Another advantage of this approach lies in the distributed control itself, which gives better performance in hard real-time computing than centralized one, and in the ability of integrating different modules through CAN.