1 |
J. Lee and B. Kim, "A low-noise fast lock phase-locked loop with adaptive bandwidth control," IEEE J. Solid-State Circuits, vol. 35, no. 8, pp. 1137-1145, Aug. 2000
DOI
ScienceOn
|
2 |
Keliu Shu, Edgar Snchez-Sinencio, Jos Silva-Martnez and Sherif H. K. Embabi, "A 2.4-GHz Monolithic Fractional-N Frequency Synthesizer With Robust Phase-Switching Prescaler and Loop Capacitance Multiplier," IEEE J. Solid-State Circuits, vol. 38, no.6, pp. 866-874, June 2003
DOI
ScienceOn
|
3 |
L. C. Liu and B. H. Li, "Fast locking scheme for PLL frequency synthesizer," Electronics Letters, vol. 40, no.15, pp. 918-920, July 2004
DOI
ScienceOn
|
4 |
J. Dunning et aI., "An all-digital phase-locked loop with 50-cycle lock time suitable for high-performancc microprocessors," IEEE J. Solid-State Circuits, vol. 30, no. 4, pp.412-422, Apr. 1995
DOI
ScienceOn
|
5 |
Ching-Yuan Yang, Shen-Juan Liu, "Fast- switching frequency synthesizer with a discriminator-aided phase detector" IEEE J. Solid-State Circuits, vol.35, NO. 10, Oct. 2000
|