• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.359-365
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• 2018

Herein, electromagnetic shielding structures to reduce the external noise coupling to printed spiral coils (PSCs) and a design method for improving the bandwidth of shielded PSCs have been proposed. It has been demonstrated that the bandwidth of shielded PSCs is limited due to the parasitic capacitance between the coils and the shielding structures and is confirmed by the transfer function simulation of the shielded PSCs with a transmission line as the radio-frequency interference noise source. A design method for the bandwidth improvement of the shielded PSCs has been proposed based on the equivalent circuit model analysis and the case studies depending on PSC designs with a three-dimensional field simulation. With the design method, an optimized shielded PSC design has been presented and successfully confirmed by experimental verification in that the optimized design results in a significant bandwidth improvement.

• Fire Science and Engineering
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• v.27 no.6
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• pp.89-96
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• 2013

The purpose of this study is to check the fire origin and cause of the fire by observing the shape of the flame propagation in air-conditioner indoor unit through the fire tests. We supposed that the flame is spread from the surroundings to the top of the air-conditioner and ignited on top of the air-conditioner with n-heptane. And then repeated this experiment twice under the same conditions. After the ignition, refrigerant filled in air-conditioner and lubricating oil exploded with large explosion and flame having high temperature and pressure belched out rapidly due to bursting refrigerant pipe linked air-conditioner between 734 seconds and 559 seconds. After result of checking the combustion residue we found that almost all of that was lost except a part of the evaporator, motor and metal. The position of short-circuit traces of wiring for the air-conditioner ignited itself is similar to that of fire damage by external flame. Therefore, we verified that it is not certain to determine the ignition cause and point by only the shape of the combustion residues.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.6 s.183
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• pp.166-173
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• 2006

In this study, a probe array has been developed for use in a data storage device that is based on scanning probe microscope (SPM) and MEMS technology. When recording data bits by poling the PZT thin layer and reading them by sensing its piezoresponse, commercial probes of which the tip heights are typically shorter than $3{\mu}m$ raise a problem due to the electrostatic forces occurring between the probe body and the bottom electrode of a medium. In order to reduce this undesirable effect, a poly-silicon probe with a high aspect-ratio tip was fabricated using a molding technique. Poly-silicon probes fabricated by the molding technique have several features. The tip can be protected during the subsequent fabrication processes and have a high aspect ratio. The tip radius can be as small as 15 nm because sharpening oxidation process is allowed. To drive the probe, electrostatic actuation mechanism was employed since the fabrication process and driving/sensing circuit is very simple. The natural frequency and DC sensitivity of a fabricated probe were measured to be 18.75 kHz and 16.7 nm/V, respectively. The step response characteristic was investigated as well. Overshoot behavior in the probe movement was hardly observed because of large squeeze film air damping forces. Therefore, the probe fabricated in this study is considered to be very useful in probe-based data storages since it can stably approach toward the medium and be more robust against external shock.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.4
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• pp.304-310
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• 2017

In this paper, we propose the architecture of an IPM based lane detector for autonomous vehicles to detect and control the driving route along the curved lane. In the IPM image, we divide the area into two fields, Far/Near Field, and the lane candidate region is detected using the Hough transform to perform the matching for the curved lane. In autonomous vehicles, various algorithms must be embedded in the system. To reduce the system resources, we proposed a method to minimize the number of memory accesses to the image and various parameters on the external memory. The proposed circuit has 96% lane recognition rate and occupies 16% LUT, 5.9% FF and 29% BRAM in Xilinx XC7Z020. It processes Full-HD image at a rate of 42 fps at a 100 MHz operating clock.

• Proceedings of the KIEE Conference
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• 1997.07a
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• pp.86-88
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• 1997

The detection of the normal zones in the coil winding and the initiation of the proper dump sequence have been one of the most important areas in the superconducting magnet technology. In this paper, the process to derive optimal dump sequence has been investigated through quench simulation and analysis of magnetically coupled superconducting magnet system. The magnet terminal voltage and maximum temperature rise in the quench initiated point are calculated with respect to various input variables such as operation current, dump resistance, etc. The experimental system is comprised of sc solenoidal coil, data aquisition device, external circuit breakers and dump resistor. The quench behavior of the magnet(e.g., temperature profile and the voltage signal) was measured. From this results, theoretical predictions were found to coincide with the experimental observations.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 1998.04b
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• pp.6-6
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• 1998

In 1957, the first magnetic disk drive compatible with a movable head was introduced as an external file memory device for computer system. Since then, magnetic disks have been improved by increasing the recording density, which has brought about the development of a high performance thin film magnetic head. The thin film magnetic head has a magnetic circuit on a ceramic substrate using IC technology. The physical property of the substrate material is very important because it influences the tribology of head/disk interface and also manufacturing process of the head. $Al_{2}O_{3}$-TiC ceramics, so called ALTIC, is known to be one of the best substrate materials which satisfies this property requirement. Even though the head is not in direct contact with the disk, frequent instantaneous contacts are unavoidable due to its high rotating speed and the close gap between them. This may cause damage in the magnetic recording media and, thus, it is very important that the magnetic head has a good wear resistance. $Al_{2}O_{3}$-TiC ceramics has an excellent tribological property in head/disk interface. Manufacturing process of thin film head is similar to that of IC, which requires extremely smooth and flat surface of the substrate. The substrate must be readily sliced into the heads without chipping. $Al_{2}O_{3}$-TiC ceramics has excellent machineability and mechanical properties. $Al_{2}O_{3}$-TiC ceramics was first developed at Nippon Tungsten Co. as cutting tool materials in 1968, which was further developed to be used as the substrate materials for thin film head in collaboration with Sumitomo Special Metals Co., Ltd. in 1981. Today, we supply more than 60% of the substrates for thin film head market in the world. In this paper, we would like to present the sintering process of $Al_{2}O_{3}$-TiC ceramics and its property in detail.

• Journal of information and communication convergence engineering
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• v.10 no.1
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• pp.85-90
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• 2012

A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.3
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• pp.577-582
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• 2016

The synchronous TDC(Time-to-Digital Converter) of counter-type using current-conveyor is designed by $0.18{\mu}m$ CMOS process and the supply voltage is 3 volts. In order to compensate the disadvantage of a asynchronous TDC the clock is generated when the start signal is applied and the clock is synchronized with the start signal. In the asynchronous TDC the error range of digital output is from $-T_{CK}$ to $T_{CK}$. But the error range of digital output is from 0 to $T_{CK}$ in the synchronous TDC. The error range of output is reduced by the synchronization between the start signal and the clock when the timing-interval signal is converted to digital value. Also the structure of the synchronous TDC is simple because there is no the high frequency external clock. The operation of designed TDC is confirmed by the HSPICE simulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.143-146
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• 2011

A 50-MS/s 10-bit pipelined ADC with 1.2Vpp differential input range is proposed in this paper. The designed pipelined ADC consists of eight stage of 1.5bit/stage, one stage of 2bit/stage, digital error correction block, bias & reference driver, and clock generator. 1.5bit/stage is consists of sub-ADC, DAC and gain stage, Specially, a sample-and hold amplifier (SHA) is removed in the designed pipelined ADC to reduce the hardware and power consumption. Also, the proposed bootstrapped switch improves the Linearity of the input analog switch and the dynamic performance of the total ADC. The reference voltage was driven by using the on-chip reference driver without external reference. The proposed pipelined ADC was designed by using a 0.18um 1-poly 5-metal CMOS process with 1.8V supply. The total area including the power decoupling capacitor and power consumption are $0.95mm^2$ and 60mW, respectively. Also, the simulation result shows the ENOB of 9.3-bit at the Nyquist sampling rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8A
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• pp.1252-1258
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• 1999

This paper describes a COMS IF transceiver IC for 10-MHz bandwidth wireless local loops. It interfaces between the RF section and the digital MODEM section and performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. The chip incorporates variable gain amplifiers, phase-locked loops, low pass filters, analog-to-digital and digital-to-analog converters. It has been implemented in a 0.6 -${\mu}{\textrm}{m}$ 2-poly 3-metal CMOS process. The phase-locked loops include voltage-controlled oscillators, dividers, phase detectors, and charge pumps on chip. The only external complonents are the filter and the varactor-tuned LC tank circuit. The chip size is 4 mm $\times$ 4 mm and the total supply current is about 57 mA at 3.3 V.