• Journal of IKEEE
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• v.14 no.2
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• pp.64-68
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• 2010

This paper proposes efficient log and exponent calculation methods using a dual phase instruction set without additional ALU unit for a mobile enviroment. Using the Dual Phase Instruction set, it extracts exponent and mantissa from expression of floating point and calculates 24bit single precision floating point of log approximation using the Taylor series expansion algorithm. And with dual phase instruction set, it reduces instruction excution cycles. The proposed Dual Phase architecture reduces the performance degradation and maintain smaller size.

• Korean Journal of Mathematics
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• v.30 no.3
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• pp.433-442
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• 2022

Let N^(q) be an arithmetic table of a negative exponent polynomial with q-commuting variables. We study sequential properties of diagonal sums of N^(q). We first device a q-coefficient table $\hat{N}$ of N^(q), find sequences of diagonal sums over $\hat{N}$, and then retrieve the findings of $\hat{N}$ to N^(q). We also explore recurrence rules of s-slope diagonal sums of N^(q) with various s and q.

• Honam Mathematical Journal
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• v.42 no.1
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• pp.1-15
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• 2020

In this work we investigate interrelationships between two arithmetic tables of (cx² + x + 1)^±m. It would give a way to expand (cx²+x+1)^-m by means of the coefficients of (x²+x+1)^m.

• Wind and Structures
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• v.19 no.5
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• pp.505-522
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• 2014

While effects of the atmospheric boundary layer flow on engineering infrastructure are more or less known, some local transient winds create difficulties for structures, traffic and human activities. Hence, further research is required to fully elucidate flow characteristics of some of those very unique local winds. In this study, important characteristics of observed vertical velocity profiles along the main wind direction for the gusty Bora wind blowing along the eastern Adriatic coast are presented. Commonly used empirical power-law and the logarithmic-law profiles are compared against unique 3-level high-frequency Bora measurements. The experimental data agree well with the power-law and logarithmic-law approximations. An interesting feature observed is a decrease in the power-law exponent and aerodynamic surface roughness length, and an increase in friction velocity with increasing Bora wind velocity. This indicates an urban-like velocity profile for smaller wind velocities and rural-like velocity profile for larger wind velocities, which is due to a stronger increase in absolute velocity at each of the heights observed as compared to the respective velocity gradient (difference in average velocity among two different heights). The trends observed are similar during both the day and night. The thermal stratification is near neutral due to a strong mechanical mixing. The differences in aerodynamic surface roughness length are negligible for different time averaging periods when using the median. For the friction velocity, the arithmetic mean proved to be independent of the time record length, while for the power-law exponent both the arithmetic mean and the median are not influenced by the time averaging period. Another issue is a large difference in aerodynamic surface roughness length when calculating using the arithmetic mean and the median. This indicates that the more robust median is a more suitable parameter to determine the aerodynamic surface roughness length than the arithmetic mean value. Variations in velocity profiles at the same site during different wind periods are interesting because, in the engineering community, it has been commonly accepted that the aerodynamic characteristics at a particular site remain the same during various wind regimes.

• Journal of the Korean Ceramic Society
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• v.31 no.10
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• pp.1141-1146
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• 1994

Cyclic fatigue experiment was carried out to predict the life time of alumina ceramics. Four kinds of model were suggested to obtain the adequate representative static stress corresponding to the cyclic stress applied to the alumina specimens. Arithmetic mean stress model gives 21.81 of the crack growth exponent, integrated stress model gives 22.15, maximum stress model gives 24.57, and equivalent static stress model gives 24.43. It is considered that the equivalent static stress model is the most reasonable and gives the best adequate crack growth exponents value.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.12
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• pp.2921-2926
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• 2013

In this paper, a decimal floating-point arithmetic unit(DFP) was proposed and redesigned to support high speed arithmetic operation employed parallel processing technique. The basic architecture of the proposed DFP was based on the L.K.Wang's DFP and improved it enabling high speed operation by parallel processing for two operands with same size of exponent. The proposed DFP was synthesized as a target device of xc2vp30-7ff896 using Xilinx ISE and verified by simulation using Flowrian tool of System Centroid co. Compared to L.K.Wang's DFP and reference [6]'s method, the proposed DFP improved data processing speed about 8.4% and 3% respectively in case of same input data.

• Annals of Clinical Neurophysiology
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• v.4 no.1
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• pp.28-33
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• 2002

Backgrounds and objective : EEG reflect dynamic changes of continuous neuronal activities by internal and external stimuli. The aim of this study is to quantify nonlinearly the local dynamic differences among EEG data corresponding to different states of brain. Methods : EEG was recorded from twelve healthy normal subjects(mean age, 29.7 years; 8 men and 4 women) using digital EEG machine. 18-channel EEG data were selected during eyes closed(EC), eyes open(EO), and mental arithmetic(MA) in each subject. Correlation dimension(D2) and largest Lyapunov exponent(LLE) were calculated from three states and average value was mapped 2 dimensionally and compared with each other. Results : The distribution of D2 was relatively symmetric and its value was higher in frontal than in parieto-occipital region during EC. These findings were reversed during EO. Bilateral centro-temporo-parietal region showed high D2 value in MA compared with those in EC, which was more prominent in left side. LLE was larger than zero in all state and showed significant differences among EC, EO and MA(p=0.000). Conclusion : These results suggest that nonlinear analysis of EEG can quantify dynamic state of brain.

• Journal of the korean Society of Automotive Engineers
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• v.14 no.5
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• pp.41-53
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• 1992

The main purpose of this study is to investigate the atomizing characteristics of a two phase spray by using a liquid column type coaxial nozzle. The experiments have been carried out to analyze the atomization behavior, the droplet size distributions, and the statistical properties of droplet size distributions. Immersion sampling method and the image processing technique were adapted for the measurements of particles, and the distributions of the droplet sizes were statistically analyzed. In the experiments, the mass ratio defined as Mr= $M_{\sigma}$/ $M_{1}$ has been changed from 1.0 to 3.4 and the measurements have been performed along the axis of the spray. As a result of this experimental study, the distributions of droplet size were satisfied with the Log-Normal distributions and arithmetic mean diameter and deviation of mass ratio. Droplet volume-surface mean diameter was denoted by a exponential function of mass-ratio and the exponent was denoted by linear relation according to the central axis from the nozzle. Dispersions, skewness factors and flatness factors had comparatively constant values regardless of mass ratio and location.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.4
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• pp.81-93
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• 2000

In a methodological approach to improve the processing performance of modulo exponentiation which is the primary arithmetic in RSA crypto algorithm, we present a new RSA hardware architecture based on high-radix modulo multiplication and CRT(Chinese Remainder Theorem). By implementing the modulo multiplier using radix-16 arithmetic, we reduced the number of PE(Processing Element)s by quarter comparing to the binary arithmetic scheme. This leads to having the number of clock cycles and the delay of pipelining flip-flops be reduced by quarter respectively. Because the receiver knows p and q, factors of N, it is possible to apply the CRT to the decryption process. To use CRT, we made two s/2-bit multipliers operating in parallel at decryption, which accomplished 4 times faster performance than when not using the CRT. In encryption phase, the two s/2-bit multipliers can be connected to make a s-bit linear multiplier for the s-bit arithmetic operation. We limited the encryption exponent size up to 17-bit to maintain high speed, We implemented a linear array modulo multiplier by projecting horizontally the DG of Montgomery algorithm. The H/W proposed here performs encryption with 15Mbps bit-rate and decryption with 1.22Mbps, when estimated with reference to Samsung 0.5um CMOS Standard Cell Library, which is the fastest among the publications at present.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.4
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• pp.355-355
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• 2002

In this paper, we designed a FPU(floating point unit) that it is very important and requires of high density when digital audio is designed. Almost audio system must support the multi-channel and required for high quality. A floating point arithmetic function in MPEG-2 AAC that implemented by hardware is able to realtime decoding when DSP realization. The reason is that MPEG-2 AAC is compatible to the Audio field of MPEG-4 and afterwards. We designed a FPU by hardware to increase the speed of a floating point unit with much calculation part in the MPEG-2 AAC Decoder. A FPU is composed of a multiplier and an adder. A multiplier used the Radix-4 Booth algorithm and an adder adopted 1's complement method for speed up. A form of a floating point unit has 8bit of exponent part and 24bit of mantissa. It's compatible with the IEEE single precision format and adopted a pipeline architecture to increase the speed of a processor. All of sub blocks are based on ISO/IEC 13818-7 standard. The algorithm is tested by C language and the design does by use of VHDL(VHSIC Hardware Description Language). The maximum operation speed is 23.2MHz and the stable operation speed is 19MHz.