• Proceedings of the Korea Association of Crystal Growth Conference
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• 1997.10a
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• pp.155-159
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• 1997

We investigated the effect of mechanical backside damage in Czochralski silicon wafer. The intensity of mechanical damage were evaluated by minority carrier recombination lifetime by a laser excitation/microwave reflection photoconductance decay method, photo-acoustic displacement method, X-ray section topography, and wet oxidation/preferential etch methods. The data indicate that the higher the mechanical damage intensity, the lower the minority carrier lifetime, and the photoacoustic displacement values are also increased proportionally.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.12
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• pp.1271-1276
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• 2004

Two-dimensionally arrayed nanocolumn lattices were fabricated by using double-exposure laser holographic method. The hexagonal lattice was formed by rotating the sample with 60 degree while the square lattice by 90 degree before the second laser-exposure. The reactive ion etching for a typical time of 30 min using CH$_4$/H$_2$ plasma enhanced the aspect-ratio by more than 1.5 with a slight increase of the bottom width of columns. The etch-damage was observed by photoluminescence (PL) spectroscopy which was removed by the wet chemical etching using HBr/$H_2O$$_2$/$H_2O$ solution, leading into the enhanced PL intensities of the PCs.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2009.05a
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• pp.107-107
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• 2009

본 연구에서는 중성빔을 이용한 Atomic Layer Etching(ALET) system을 이용하여 $ZrO_2$의 atomic layer etching mechanism에 대하여 연구하였다. Ar neutral beam irradiation dose와 $BCl_3$ gas pressure의 변화에 따라 $ZrO_2$ etch rate와 RMS roughness를 관찰했을 때, Ar neutral beam irradiation dose이 $1.485{\times}10^{16}atoms/cm^2{\bullet}cycle$ 이상이고 $BCl_3$ gas pressure가 0.15mTorr 이상 일 때 $ZrO_2$ etch rate은 $1.07\;{\AA}/cycle$의 일정한 값에서 유지됨을 확인하였다. 그리고 ALET와 ICP Etcher을 통해 $ZnO_2$를 각각 식각하여 physically or chemically damage를 비교한 결과, ALET가 기존의 ICP Etcher system보다 $ZrO_2$ 식각공정에 대해 적은 damage를 받는 것을 ARXPS를 통해 관찰 하였다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2003.10a
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• pp.63-63
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• 2003

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.58-61
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• 2002

SBT thin films were etched at different content of Cl$_2$in Cl$_2$/Ar plasma. We obtained the maximum etch rate of 883 ${\AA}$/min at Cl$_2$(20%)/Ar(80%). As Cl$_2$ gas increased in Cl$_2$/Ar plasma, the etch rate decreased. The maximum etch rate may be explained by variation of volume density for Cl atoms and by the concurrence of two etching mechanisms such as physical sputtering and chemical reaction with formation of low-volatile products, which can be desorbed only by ion bombardment. The variation of volume density for Cl, F and Ar atoms and ion current density were measured by the optical emission spectroscopy and Langmuir probe. To evaluate the physical damage due to plasma, X-ray diffraction and atomic force microscopy analysis carried out. After etching process, P-E hysteresis loops were measured by ferroelectric workstation.

• ETRI Journal
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• v.24 no.5
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• pp.398-400
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• 2002

Using $Cr_2O_3$ thin film, we developed a novel etch-stop technique for the protection of silicon surface morphology during deep ion coupled plasma etching of silica layers. With this technique we were able to etch a silica trench with a depth of over 20 ${\mu}m$ without any damage to the exposed silicon terrace surface. This technique should be well applicable to fabricating silica planar lightwave circuit platforms for opto-electronic hybrid integration.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.287-287
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• 2011

ITRS(international technology roadmap for semiconductors)에 따르면 MOS (metal-oxide-semiconductor)의 CD(critical dimension)가 45 nm node이하로 줄어들면서 poly-Si/SiO2를 대체할 수 있는 poly-Si/metal gate/high-k dielectric이 대두되고 있다. 일반적으로 metal gate를 식각시 정확한 CD를 형성시키기 위해서 plasma를 이용한 RIE(reactive ion etching)를 사용하고 있지만 PIDs(plasma induced damages)의 하나인 PICD(plasma induced charging damage)의 발생이 문제가 되고 있다. PICD의 원인으로 plasma의 non-uniform으로 locally imbalanced한 ion과 electron이 PICC(plasma induced charging current)를 gate oxide에 발생시켜 gate oxide의 interface에 trap을 형성시키므로 그 결과 소자 특성 저하가 보고되고 있다. 그러므로 본 연구에서는 이에 차세대 MOS의 metal gate의 식각공정에 HDP(high density plasma)의 ICP(inductively coupled plasma) source를 이용한 중성빔 시스템을 사용하여 PICD를 줄일 수 있는 새로운 식각 공정에 대한 연구를 하였다. 식각공정조건으로 gas는 HBr 12 sccm (80%)와 Cl2 3 sccm (20%)와 power는 300 w를 사용하였고 200 eV의 에너지로 식각공정시 TEM(transmission electron microscopy)으로 TiN의 anisotropic한 형상을 볼 수 있었고 100 eV 이하의 에너지로 식각공정시 하부층인 HfO2와 높은 etch selectivity로 etch stop을 시킬 수 있었다. 실제 공정을 MOS의 metal gate에 적용시켜 metal gate/high-k dielectric CMOSFETs의 NCSU(North Carolina State University) CVC model로 effective electric field electron mobility를 구한 결과 electorn mobility의 증가를 볼 수 있었고 또한 mos parameter인 transconductance (Gm)의 증가를 볼 수 있었다. 그 원인으로 CP(Charge pumping) 1MHz로 gate oxide의 inteface의 분석 결과 이러한 결과가 gate oxide의 interface trap양의 감소로 개선으로 기인함을 확인할 수 있었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.280-285
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• 2003

The influence of silicon surface damage on nickel-silicide (NiSi) has been characterized and H$_2$ anneal and TiN rapping has been applied to suppress the electrical, morphological deterioration phenomenon incurred by the surface damage. The substrate surface is intentionally damaged using Ar IBE (Ion beam etching) which can Precisely control the etch depth. The sheet resistance of NiSi increased about 18% by the surface damage, which is proven to be mainly due to the reduced silicide thickness. It is shown that simultaneous application of H: anneal and TiN capping layer is highly effective in suppressing the surface damage effect.

• Transactions on Electrical and Electronic Materials
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• v.3 no.3
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• pp.14-17
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• 2002

The HDP (High Density Plasma) CVD process consists of a simultaneous sputter etch and chemical vapor deposition. As CMOS process continues to scale down to sub- quarter micron technology, HDP process has been widely used fur the gap-fill of small geometry metal spacing in inter-metal dielectric process. However, HBP CVD system has some potential problems including plasma-induced damage. Plasma-induced gate oxide damage has been an increasingly important issue for integrated circuit process technology. In this paper, thin gate oxide charge damage caused by HDP deposition of inter-metal dielectric was studied. Multiple step HDP deposition process was demonstrated in this work to prevent plasma-induced damage by introducing an in-situ top SiH$_4$ unbiased liner deposition before conventional deposition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.363-363
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• 2008

The development of dry etching process for sapphire wafer with plasma has been key issues for the opto-electric devices. The challenges are increasing control and obtaining low plasma induced-damage because an unwanted scattering of radiation is caused by the spatial disorder of pattern and variation of surface roughness. The plasma-induced damages during plasma etching process can be classified as impurity contamination of residual etch products or bonding disruption in lattice due to charged particle bombardment. Therefor, fine pattern technology with low damaged etching process and high etch rate are urgently needed. Until now, there are a lot of reports on the etching of sapphire wafer with using $Cl_2$/Ar, $BCl_3$/Ar, HBr/Ar and so on [1]. However, the etch behavior of sapphire wafer have investigated with variation of only one parameter while other parameters are fixed. In this study, we investigated the effect of pressure and other parameters on the etch rate and the selectivity. We selected $BCl_3$ as an etch ant because $BCl_3$ plasmas are widely used in etching process of oxide materials. In plasma, the $BCl_3$ molecule can be dissociated into B radical, $B^+$ ion, Cl radical and $Cl^+$ ion. However, the $BCl_3$ molecule can be dissociated into B radical or $B^+$ ion easier than Cl radical or $Cl^+$ ion. First, we evaluated the etch behaviors of sapphire wafer in $BCl_3$/additive gases (Ar, $N_2,Cl_2$) gases. The behavior of etch rate of sapphire substrate was monitored as a function of additive gas ratio to $BCl_3$ based plasma, total flow rate, r.f. power, d.c. bias under different pressures of 5 mTorr, 10 mTorr, 20 mTorr and 30 mTorr. The etch rates of sapphire wafer, $SiO_2$ and PR were measured with using alpha step surface profiler. In order to understand the changes of radicals, volume density of Cl, B radical and BCl molecule were investigated with optical emission spectroscopy (OES). The chemical states of $Al_2O_3$ thin films were studied with energy dispersive X-ray (EDX) and depth profile anlysis of auger electron spectroscopy (AES). The enhancement of sapphire substrate can be explained by the reactive ion etching mechanism with the competition of the formation of volatile $AlCl_3$, $Al_2Cl_6$ or $BOCl_3$ and the sputter effect by energetic ions.