• Title/Summary/Keyword: error protection

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Unequal Error Control Properties of Convolutional Codes (길쌈부호의 부등오류제어 특성)

  • Lee, Soo-In;Lee, Sang-Gon;Moon, Sang-Jae
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.2
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    • pp.1-8
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    • 1990
  • The unequal bit-error control of rate r=b/n binary convolutional code is analyzed. The error protection afforded to each digit of the viterbi decoded b-tuple information word can be different from that afforded to other digit. The property of the unequal protection can be applied for improvement of SNR in transmitting sampled data of DPCM system.

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A Study on AC Modeling of the ESD Protection Devices (정전기 보호용 소자의 AC 모델링에 관한 연구)

  • Choi, Jin-Young
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.136-144
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    • 2004
  • From the AC analysis results utilizing a two dimensional device simulator, the ac equivalent-circuit modeling of the ESD protection devices is executed. It is explained that the ac equivalent circuit of the NMOS protection transistor is modeled by a rather complicated form and that, depending on the frequency range, the error can be large if it is modeled by a simple RC serial circuit. It is also shown that the ac equivalent circuit of the thyristor-type pnpn protection device can be modeled by a simple RC serial circuit. Based on the circuit simulations utilizing the extracted equivalent circuits, the effects of the parasitics in the protection device on the characteristics of LNA are examined when the LNA, which is one of the important RF circuits, is equipped with the protection device. It is explained that a large error can result in estimating the circuit characteristics if the NMOS protection transistor is modeled by a simple capacitor. It is also confirmed that the degradation of the LNA characteristics by incorporating the ESD protection device can be reduced a lot by adopting the suggested pnpn device.

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Reliability Improvement of the Tag Bits of the Cache Memory against the Soft Errors (소프트 에러에 대한 캐쉬 메모리의 태그 비트 신뢰성 향상 기법)

  • Kim, Young-Ung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.1
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    • pp.15-21
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    • 2014
  • Due to the development of manufacturing technology scaling, more transistors can be placed on a cache memories of a processor. However, processors become more vulnerable to the soft errors because of highly integrated transistors, the reliability of cache memory must consider seriously at the design level. Various researches are proposed to overcome the vulnerability of soft error, but researches of tag bit are proposed very rarely. In this paper, we revaluate the reliability improvement technique for tag bit, and analyse the protection rate of write-back operation, which is a typical case of not satisfying temporal locality. We also propose the methodology to improve the protection rate of write-back operation. The experiments of the proposed scheme shows up to 76.8% protection rate without performance degradations.

Error resilience video coding of DMB video stream using AVC redundant slice (AVC 잉여슬라이스를 이용한 DMB 비디오 스트림의 오류내성부호화)

  • Hong, Sung-Hoon;Baek, Sun-Hye;Na, Nam-Woong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2004.05a
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    • pp.707-710
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    • 2004
  • In the case of terrestrial DMB(Digital Multimedia Broadcasting) system that offers mobile multimedia broadcasting services, transmission error must be considered. Although DMB transmission system provides the error protection functions of convolution coding and Reed-Solomon (204,188,t=8) coding, additional error resilience video coding methods are needed to satisfy the requirement of BER lower than $10^{-8}$. In this thesis, we propose and evaluate effective error resilience coding schemes using the MPEG-4 redundant slice for MPEG-4 video services in the DMB environment. In this scheme, we analyze the drift error caused by transmission error based on the random noise concept and the redundant slice selection algorithm that selects the most influential slice in the view of the drift error increment.

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Investigation into Transformer Protective Relay Setting Rule Considering Error Ratio (오차를 고려한 765kV 변압기 보호 계전 정정룰 고찰)

  • Bae, Y.J.;Lee, S.J.;Choi, M.S.;Kang, S.H.;Kim, S.T.;Choi, J.L.;Jeong, C.H.;Yoo, Y.S.;Cho, B.S.
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.229-231
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    • 2002
  • The digital current differential relaying scheme is widely used for primary protection of 765(kV) power transformer. The current differential relay pickup the internal fault at the threshold which is set at 30% of rating current. Margin of 30% include current transformer error 5%, relay error 5%, on load tap changer error 7% and margin factor 140% obtained from the field experience. In this paper transformer protection relay and relay setting rule of high voltage power system are discussed. And we verify the correctness of relay setting rule with current differential relay using Matlab simulation.

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A Study on Measurement of Length and Slope of Temporary Structure using UAV (무인항공기를 활용한 가설구조물의 길이와 기울기 측정에 관한 연구)

  • Min-Guk, Kang;Seung-Hyeon, Shin;JongKeun, Park;Jeong-Hun, Won
    • Journal of the Korean Society of Safety
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    • v.37 no.6
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    • pp.89-95
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    • 2022
  • A method for measuring the length and slope of a temporary structure using an unmanned aerial vehicle (UAV) and 3D modeling method is proposed. The actual length and slope of the vertical member of the specimen were measured and compared with the measured values obtained by the proposed method for the specimens with and without the vertical protection net installed. Based on the result of measuring the length of the temporary structure specimen using the UAV and 3D modeling method, the measured value showed an error of 0.87% when compared to the actual length in the specimen without the vertical protection net installed. In addition, the error of the slope was 0.63°. It was thought that the proposed method could be usable for the purpose of finding parts in wrong installation state on the temporary structure and informing the manager in charge. However, in the case of the specimen with the vertical protection net, the measurement showed a 1.46% error in length and 2.77° difference in slope. Therefore, if a vertical protection net is to be installed in a temporary structure, the measurement accuracy should be improved by utilizing an image processing method, etc.

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1673-1681
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    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

Graceful Degradation FEC Layer for Multimedia Broadcast/Multicast Service in LTE Mobile Systems

  • Won, Seok Ho
    • ETRI Journal
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    • v.35 no.6
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    • pp.1068-1074
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    • 2013
  • This paper proposes an additional forward error correction (FEC) layer to compensate for the defectiveness inherent in the conventional FEC layer in the Long Term Evolution specifications. The proposed additional layer is called a graceful degradation (GD)-FEC layer and maintains desirable service quality even under burst data loss conditions of a few seconds. This paper also proposes a non-delayed decoding (NDD)-GD-FEC layer that is inherent in the decoding process. Computer simulations and device-based tests show a better loss recovery performance with a negligible increase in CPU utilization and occupied memory size.

Automotive High Side Switch Driver IC for Current Sensing Accuracy Improvement with Reverse Battery Protection

  • Park, Jaehyun;Park, Shihong
    • Journal of Power Electronics
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    • v.17 no.5
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    • pp.1372-1381
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    • 2017
  • This paper presents a high-side switch driver IC capable of improving the current sensing accuracy and providing reverse battery protection. Power semiconductor switches used to replace relay switches are encumbered by two disadvantages: they are prone to current sensing errors and they require additional external protection circuits for reverse battery protection. The proposed IC integrates a gate driver and current sensing blocks, thus compensating for these two disadvantages with a single IC. A p-sub-based 90-V $0.13-{\mu}m$ bipolar-CMOS-DMOS (BCD) process is used for the design and fabrication of the proposed IC. The current sensing accuracy (error ${\leq}{\pm}5%$ in the range of 0.1 A-6.5 A) and the reverse battery protection features of the proposed IC were experimentally tested and verified.

Development of MATLAB GUI Based Software for Analysis of KASS Availability Performance (KASS 가용성 성능 평가를 위한 MATLAB GUI 기반 소프트웨어 설계)

  • Choi, Bong-kwan;Han, Deok-hwa;Kim, Dong-uk;Kim, Jung-beom;Kee, Chang-don
    • Journal of Advanced Navigation Technology
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    • v.22 no.5
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    • pp.384-390
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    • 2018
  • This paper introduces a MATLAB graphical user interface (GUI) based software for analysis of korea augmentation satellite system (KASS) availability performance. This software uses minimum variance (MV) estimator and Kriging algorithm to generate integrity information such as user differential range error (UDRE) and grid ionospheric vertical error (GIVE). The information is offered to ground and aviation users in Korean region. The software also gives accuracy data, protection level data and availability map about each user position by using the integrity information. In particular the software calculates the protection level along a path of aircraft. We verified the result of protection level of aviation user by comparing them with the results of SBASimulator#2, which is a simulation tool of european geostationary navigation overlay service (EGNOS). As a result, the protection level error between the result of our software and the SBASimulator#2 was about 2% which means that the result of our software is accurate.