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http://dx.doi.org/10.7236/JIIBC.2014.14.1.15

Reliability Improvement of the Tag Bits of the Cache Memory against the Soft Errors  

Kim, Young-Ung (Dept. of Computer Engineering, Hansung University)
Publication Information
The Journal of the Institute of Internet, Broadcasting and Communication / v.14, no.1, 2014 , pp. 15-21 More about this Journal
Abstract
Due to the development of manufacturing technology scaling, more transistors can be placed on a cache memories of a processor. However, processors become more vulnerable to the soft errors because of highly integrated transistors, the reliability of cache memory must consider seriously at the design level. Various researches are proposed to overcome the vulnerability of soft error, but researches of tag bit are proposed very rarely. In this paper, we revaluate the reliability improvement technique for tag bit, and analyse the protection rate of write-back operation, which is a typical case of not satisfying temporal locality. We also propose the methodology to improve the protection rate of write-back operation. The experiments of the proposed scheme shows up to 76.8% protection rate without performance degradations.
Keywords
Tag Bits; Reliability; Soft Error; Protection Rate;
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Times Cited By KSCI : 2  (Citation Analysis)
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