• Journal of Power Electronics
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• 제18권3호
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• pp.662-671
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• 2018

This paper presents a new structure for a step up dc-dc converter, which has several advantageous features. Firstly, the input dc source and the clamped capacitor are connected in series to transfer energy to the load through dual voltage multiplier cells. Therefore, the proposed converter can produce a very high voltage and a high conversion efficiency. Secondly, a double voltage clamped circuit is introduced to the primary side of the coupled inductor. The energy of the leakage inductance of the coupled inductor is recycled and the inrush current problem of the clamped circuits can be shared equally by two synchronous clamped capacitors. Therefore, the voltage spike of the switch tube is solved and the current stress of the diode is reduced. Thirdly, dual voltage multiplier cells can absorb the leakage inductance energy of the secondary side of the coupled inductor to obtain a higher efficiency. Fourthly, the active switch turns on at almost zero current and the reverse-recovery problem of the diodes is alleviated due to the leakage inductance, which further improves the conversion efficiency. The operating principles and a steady-state analysis of the continuous, discontinuous and boundary conduction modes are discussed in detail. Finally, the validity of this topology is confirmed by experimental results.

• 한국전기전자재료학회논문지
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• 제24권2호
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• pp.136-140
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• 2011

The fault current limiting characteristics of the flux-lock type superconducting fault current limiter (SFCL) using a transformer winding were investigated. The suggested flux-lock type SFCL consists of two parallel connected coils on an iron core and the transformer winding connected in series with one of two coils. In this SFCL, the high-TC superconducting (HTSC) element was connected with the secondary side of the transformer. The short-circuit experimental devices to analyze the fault current limiting characteristics of the flux-lock type SFCL using the transformer winding were constructed. Through the short-circuit tests, the flux-lock type SFCL using transformer winding was shown to perform more effective fault current limiting operation compared to the previous flux-lock type SFCL without the transformer winding from the viewpoint of the quench occurrence and the recovery time of the HTSC element.

• Journal of Power Electronics
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• 제14권3호
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• pp.413-420
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• 2014

The conventional Phase-Shift Full-Bridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48V-to-30V/15A prototype.

• 전기학회논문지P
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• 제65권3호
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• pp.158-164
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• 2016

In this paper, a high frequency flyback type zero voltage soft switching PWM DC-DC converter using IGBTs is proposed. Effective applications for this power converter can be found in auxiliary power supplies of rolling stock transportation and electric vehicles. This power converter is basically composed of active power switches and a flyback high frequency transformer. In addition to these, passive lossless snubbers with power regeneration loops for energy recovery, consisting of a three winding auxiliary high frequency transformer, auxiliary capacitors and diodes are introduced to achieve zero voltage soft switching from light to full load conditions. Furthermore, this power converter has some advantages such as low cost circuit configuration, simple control scheme and high efficiency. Its operating principle is described and to determine circuit parameters, some practical design considerations are discussed. The effectiveness of the proposed power converter is evaluated and compared with the hard switching PWM DC-DC converter from an experimental point of view and the comparative electromagnetic conduction and radiation noise characteristics of both DC-DC power converter circuits are also depicted.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.443-445
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• 2008

용량성 부하를 사용하는 응용사례가 늘어남에 따라 에너지 회수 회로의 중요성 또한 더욱 부각되고 있다. 특히, 고전압 구동의 경우 에너지 회수를 하지 않을 경우 손실이 크게 발생하며 충방전시 돌입 전류로 인한 노이즈 문제 또한 발생하게 된다. 본 논문에서는 단권변압기를 사용한 새로운 형태의 에너지 회수 회로를 제안한다. 제안한 회로는 모든 스위치가 동일한 전압, 전류 스트레스를 받으며 항상 스위치를 통해 흐르는 전류가 대칭적으로 분배되기 때문에 도통 손실을 줄일 수 있으며 단권변압기를 통하여 용량성 부하가 연결되기 때문에 영전압 실패시 발생 할 수 있는 돌입 전류로 인한 전자파 발생 및 도통, 스위칭 손실을 막을 수 있다는 장점을 갖는다. 이에 대한 이론적 해석과 시뮬레이션과 용량성 부하를 이용한 실험을 통해 타당성을 검증하였다.

• KIEE International Transactions on Electrophysics and Applications
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• 제2C권5호
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• pp.253-257
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• 2002

A new Current-Controlled Driving Method that can drive AC PDPs with low voltage and high luminous efficiency for the sustaining period is presented. In this driving method, the voltage source is connected to a storage capacitor and the stored voltage is delivered to the panel through LC resonance. Thus, this driving method can drive the panel with a voltage source as low as about half of the voltage necessary in the conventional driving methods. The discharge current flowing into the AC PDP is limited in this method. Thus, the power consumption for the discharge is reduced and the discharge input power to output luminance efficiency is improved. Experimental results using this driving method showed that we could drive an AC PDP with a voltage source as low as 146V and that high luminous efficiency of 1.33 1m／W can be achieved.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.817-824
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• 2016

A simultaneous bidirectional transceiver over a single wire has been developed in a 65 nm CMOS technology for a command and control bus. The echo signals of the simultaneous bidirectional link are cancelled by controlling the decision level of receiver comparators without power-hungry operational amplifier (op-amp) based circuits. With the clock information embedded in the rising edges of the signals sent from the source side to the sink side, the data is recovered by an open-loop digital circuit with 20 times blind oversampling. The data rate of the simultaneous bidirectional transceiver in each direction is 75 Mbps and therefore the overall signaling bandwidth is 150 Mbps. The measured energy efficiency of the transceiver is 56.7 pJ/b and the bit-error-rate (BER) is less than $10^{-12}$ with $2^7-1$ pseudo-random binary sequence (PRBS) pattern for both signaling directions.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.95-98
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• 2002

본 논문에서는 AC-PDP 구동에 있어 효율적이며, 패널 전압을 빠르게 상승시킬 수 있어 현재 많이 이용되는 ADS 구동 방식에 적합한 에너지 회수 회로를 제안한다. 제안된 회로는 기존의 LC 순수 공진의 방식을 적용하여 에너지를 회수하는 방식 Weber 회로와 비교하여 제한적인 유지 기간 동안 동작 여유 마진을 증가시킬 수 있고, 픽셀의 ON$\cdot$OFF 상태와 상관없이 효율을 증가시킬 수 있다. 제안하는 회로를 기존의 Weber 회로와 비교하여 동작원리와 특징들을 분석하고, 7.5 인치 PDP 시작품을 이용하여 제안하는 회로의 타당성과 우수성을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.627-630
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• 2002

본 논문에서는 플라즈마 디스플레이 패널(PDP)의 높은 소비 전력을 줄이기 위해 요구되어지는 에너지 회수회로를 제안한다. 제안하는 회로는 기존의 회로와 비교하여 저가형 구조를 가지며 효율을 증대 시킬 수 있는 장점을 가진다 본 회로는 유지 구간 동안 두 번의 공진을 수행하게 된다. 패널과 병렬로 결합된 인덕터와 외부 캐패시터 사이에서 발생하는 첫 번째 공진은 정$\cdot$부의 선택적인 펄스를 발생시키기 위해 이용되고, 스위치 오프 구간동안 순간적으로 발생되는 인덕터와 패널사이의 두번째 공진은 PDP의 용량성 변위 전류에 의한 에너지를 회수하게 된다. 제안하는 회로의 동작원리와 설계절차를 제시하였으며, 7.5인치 패널을 이용한 시작품을 제작하여 시뮬레이션과 실험결과를 통해 타당성 을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.631-634
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• 2002

Plasma Display Panel의 기술은 급격하게 발전하고 있지만, 여전히 몇 가지 문제를 해결하기 위해 다각적인 접근이 이루어지고 있다. 동화상의 윤곽제거, 광 대비 향상을 통한 화질의 개선, 신뢰도 및 전력 효율을 개선하는 등의 문제가 여기에 해당되며 그 중에서도 특히, 전력 효율을 향상시키기 위해서는 PDP의 발광효율을 높이는 것과 함께 기체방전과는 직접적인 관련이 없이 구동과정에서 발생하게 되는 불필요한 전력 소모를 최소화하여야한다. 본 논문에서는 이러한 전력소모를 최소화하기 위한 새로운 형태의 고효율 에너지 회수 회로를 제안하고 시뮬레이션을 통해 그 동작을 확인하였다 그리고 제안하는 회로를 실제 7.5 인치 패널에 연결하고, 200 (kHz)에서 실험하여 제안한 에너지 회수 회로의 타당성을 검증하였다.