• Title/Summary/Keyword: emitter structure

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The Characteristics of a Dual gate Trench Emitter IGBT (이중 Gate를 갖는 Trench Emitter IGBT의 특성)

  • Gang, Yeong-Su;Jeong, Sang-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.9
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    • pp.523-526
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    • 2000
  • A dual gate trench emitter IGBT structure is proposed and studied numerically using the device simulator MEDICI. The on-state forward voltage drop latch-up current density turn-off time and breakdown voltage of the proposed structure are compared with those of the conventional DMOS-IGBT and trench gate IGBT structures. The proposed structure forms an additional channel and increases collector current level resulting in reduction of on -state forward voltage drop. In addition the trench emitter increases latch-up current density by 148% in comparison with that for the conventional DMOS-IGBT and by 83% compared with that for the trench gate IGBT without degradation in breakdown voltage when the half trench gate width(Tgw) and trench emitter depth(Ted) are fixed at $1.5\mum\; and\; 2\mum$, respectively

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The dual emitter structure for field emission light source (전계방출광원용 듀얼 에미터 특성 연구)

  • Kim, Kwang-Bok;Lee, Sun-Hee;Park, Ho-Seop;Yang, Dong-Wook;Kim, Dae-Jun
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2008.05a
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    • pp.151-154
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    • 2008
  • The field emission lamps have the advantages to their cold cathode-characteristic and the eco-friendly, We realized that the dual emitter system showed very simple structure which gate and cathode electrodes are formed on the same glass surface. In this paper, we reported the properties of dual emitters depended on variation of gate width and spacing for optimum panel structure. In combination of dual emitter structure and bi-polar driving, electron beam spreads more than normal gate structure or diode structure, and emission uniformity increased in dual emitter structure at 5"-diagonal.

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Analysis of Selective Emitter Properties Apply for Low Cost Metallization in Crystalline Silicon Solar Cells (결정질 실리콘 태양전지의 저가형 금속전극에 적용되기 위한 Selective emitter 특성 분석)

  • Kim, Min-Jeong;Lee, Ji-Hun;Cho, Kyeong-Yeon;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.454-455
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    • 2009
  • Selective emitter structure have an important research subject for crystalline silicon solar cells because it is used in production for high efficiency solar cells. A selective emitter structure with highly doped regions underneath the metal contacts is widely known to be one of the most promising high-efficiency solution in solar cell processing. Since most of the selective emitter processes require expensive extra masking and double steps process. Formation of selective emitters is not cost effective. One method that satisfies these requirements is the method of screen-printing with a phosphorus doping paste. In this paper we researched two groups of selective emitter structure process. One was using dopant paste, and the other was using solid source, in order to compare their uniformity, sheet resistance and performance condition time.

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Emitter structure dependence of the high frequency performance of AlGaAs/GaAs HBTs (에미터 구조변화에 따른 AlGaAs/GaAs HBT의 고주파 특성)

    • Journal of the Korean Vacuum Society
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    • v.9 no.2
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    • pp.167-171
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    • 2000
  • Emitter structure effects on the characteristics of AlGaAs/GaAs HBTs have been investigated. Cut-off frequency and maximum oscillation frequency were changed with emitter dimension, and it was attributed to the variation of resistance and junction capacitance with emitter structure. Emitter perimeter and junction area also affected the high frequency performance of HBTs.

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Effect of P-Emitter Length and Structure on Asymmetric SiC MOSFET Performance (P-Emitter의 길이, 구조가 Asymmetric SiC MOSFET 소자 성능에 미치는 영향)

  • Kim, Dong-Hyeon;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.2
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    • pp.83-87
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    • 2020
  • In this letter, we propose and analyze a new asymmetric structure that can be used for next-generation power semiconductor devices. We compare and analyze the electrical characteristics of the proposed device with respect to those of symmetric devices. The proposed device has a p-emitter on the right side of the cell. The peak electric field is reduced by the shielding effect caused by the p-emitter structure. Consequently, the breakdown voltage is increased. The proposed asymmetric structure has an approximately 100% higher Baliga's figure of merit (~94.22 MW/㎠) than the symmetric structure (~46.93 MW/㎠), and the breakdown voltage of the device increases by approximately 70%.

Simulation of the Strip Type CNT Field Emitter Triode Structure (띠 모양의 에미터를 가지는 탄소나노튜브 삼전극 전계방출 디스플레이 소자의 시뮬레이션)

  • 류성룡;이태동;김영길;변창우;박종원;고성우;천현태;고남제
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.11
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    • pp.1023-1028
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    • 2003
  • The field emission characteristics are studied by simulation for carbon nanotube triode structures with a strip-shaped emitter and a gate hole aligned with it. Two structures, one with double-edge and the other with single edge are analyzed. They show good emission characteristics. Emissions of electrons are concentrated on the edges of emitter and the emitted current increases as the distance between emitter and gate decreases. For single-edged emitter, the emitted electrons form a narow strip-shaped beam which has a good directionality. These triode structures have advantages in that they can be easily fabricated and aligned for assembly.

A Study on the Dual Emitter Structure 4H-SiC-based LIGBT for Improving Current Driving Capability (전류 구동 능력 향상을 위한 듀얼 이미터 구조의 4H-SiC 기반 LIGBT에 관한 연구)

  • Woo, Je-Wook;Lee, Byung-Seok;Kwon, Sang-Wook;Gong, Jun-Ho;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.371-375
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    • 2021
  • In this paper, a SiC-based LIGBT structure that can be used at high voltage and high temperature is presented. In order to improve the low current characteristic, a dual-emitter symmetrical around the gate is inserted. In order to verify the characteristics of the proposed device, simulation and design were conducted using Sentaurus TCAD simulation, and a comparative study was conducted with a general LIGBT. In addition, splitting was performed by designating a variable for the length of the N-drift region in order to verify the electrical characteristics of the minority carriers. As a result of the simulation it was confirmed that the proposed dual-emitter structure flows a higher current at the same voltage than the conventional LIGBT.

Fabrication & Properties of Field Emitter Arrays using the Mold Method for FED Application (Mold 법에 의해 제작된 FED용 전계에미터어레이의 특성 분석)

  • ;;;;K. Oura
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.347-350
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    • 2001
  • A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.

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PA study on selective emitter structure and Ni/Cu plating metallization for high efficiency crystalline silicon solar cells (결정질 실리콘 태양전지의 고효율 화를 위한 Selective emitter 구조 및 Ni/Cu plating 전극 구조 적용에 관한 연구)

  • Kim, Minjeong;Lee, Jaedoo;Lee, Soohong
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.91.2-91.2
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    • 2010
  • The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

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Analysis of The Dual-Emitter LIGBT with Low Forward Voltage Loss and High Lacth-up Characteristics (낮은 순방향 전압 강하와 높은 래치-업 특성을 갖는 이중-에미터 구조의 LIGBT에 관한 분석)

  • Jung, Jin-Woo;Lee, Byung-Seok;Park, San-Cho;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.15 no.2
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    • pp.164-170
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    • 2011
  • In this paper, we present a novel Lateral Insulated-Gate Bipolar Transistor(LIGBT) structure. The proposed structure has extra emitter between emitter and collector of the conventional structure. The added emitter can significantly improve latch-up current densities, forward voltage drop (Vce,sat) and turn-off characteristics. From the simulation results, the proposed LIGBT has the lower forward voltage drop(1.05V), the higher latch-up current densities($2.5{\times}10^3\;A/{\mu}m^2$), and the shorter turn-off time(7.4us) than those of the conventional LIGBT.