Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2001.07a
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- Pages.347-350
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- 2001
Fabrication & Properties of Field Emitter Arrays using the Mold Method for FED Application
Mold 법에 의해 제작된 FED용 전계에미터어레이의 특성 분석
Abstract
A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.