• Title/Summary/Keyword: embedded testing

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An Efficient Software Reliability Testing Method for the Model based Embedded Software (모델 기반 내장형 소프트웨어의 효율적 신뢰성 시험 기법)

  • Park, Jang-Seong;Cho, Sung-Bong;Park, Hyun-Yong;Kim, Do-Wan;Kim, Seong-Gyun
    • Journal of the Korea Society for Simulation
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    • v.27 no.1
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    • pp.25-32
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    • 2018
  • This paper presents an efficient software reliability testing method for the model based auto-generated code and reify a dynamic test procedure. The benefits of executing the model-based each static/dynamic reliability test before the code-based static/dynamic reliability test are described. Also, The correlations of code/model based reliability test are demonstrated by using model testing tool, Model Advisor and Verification and Validation, and the code testing tool, PolySpace and LDRA. The result of reliability test is indicated in this paper.

Conformance Test Scenario Extraction Techniques for Embedded Software using Test Execution Time (테스트 수행시간을 고려한 임베디드 소프트웨어의 적합성 테스트 시나리오 추출 기법)

  • Park, In-Su;Shin, Young-Sul;Ahn, Sung-Ho;Kim, Jin-Sam;Kim, Jae-Young;Lee, Woo-Jin
    • The KIPS Transactions:PartD
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    • v.17D no.2
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    • pp.147-156
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    • 2010
  • Conformance testing for embedded software is to check whether software was correctly implemented according to software specification or not. In conformance testing, test scenarios must be extracted to cover every test cases of software. In a general way, test scenarios simply focus on testing all functions at least one time. But, test scenarios are necessary to consider efficiency of test execution. In this paper, we propose a test scenario extraction method by considering function's execution time and waiting time for user interaction. A test model is a graph model which is generated from state machine diagram and test cases in software specification. The test model is augmented by describing test execution time and user interaction information. Based on the test model, test scenarios are extracted by a modified Dijkstra's algorithm. Our test scenario approach can reduce testing time and improve test automation.

A Design of BICS Circuit for IDDQ Testing of Memories (메모리의 IDDQ 테스트를 위한 내장전류감지 회로의 설계)

  • 문홍진;배성환
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.3
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    • pp.43-48
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    • 1999
  • IDDQ testing is one of current testing methodologies which increases circuit's reliability by means of finding defects which can't be detected by functional testing in CMOS circuits. In this paper, we design a Built-In Current Sensor(BICS) circuit, which can be embedded in chip under test, that performs IDDQ testing. Furthermore, it is designed for IDDQ testing of memories and implemented to carry out testing at high-speed by using small number of transistors.

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Model-Based Development and Test Method for The AUTOSAR Embedded Software (AUTOSAR 임베디드 소프트웨어의 모델기반 개발 및 테스트 방법 - 사례연구 : 운전자 위치제어 시스템)

  • Park, Gwangmin;Kum, Daehyun;Lee, Seonghun
    • IEMEK Journal of Embedded Systems and Applications
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    • v.4 no.4
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    • pp.164-173
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    • 2009
  • Automotive systems have tended to be equipped with many electronic contents to satisfy safety, comport, convenience, and entertainment services over the past years. As a result, the amount of vehicle embedded software in electrical/electronic(E/E) systems is steadily increasing to manage these requirements. This leads to the traditional, document-based software development in the vehicle embedded systems being increasingly displaced by a model-based development in order to reduce software development time and cost. Due to the application of model-based development, a great evolution is being realized in the aspect of efficiency, but the development is being made without sufficient testing. So, erroneous automotive embedded software may cause serious problems such as car accidents which relate to human safety. Therefore, efficient methods for model-based test and validation are needed to improve software reliability in the stage of embedded software development. This paper presents the model-based development and test method for AUTOSAR embedded software to improve its reliability and safety, and it is demonstrated based on the case study.

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Development of Evaluation Process and Testing Module for Weapons System Embedded Software (무기체계 내장형 소프트웨어의 평가 프로세스와 시험모듈의 개발)

  • Kim, Jung-Kook;Yang, Hae-Sool
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.2
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    • pp.401-414
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    • 2008
  • The object of quality test for weapons system embedded software is support about implement of high quality system which coincided with requirements of weapons system embedded. There are some examples which developed quality evaluation methodology, evaluation method for general embedded software. But the concrete system for weapons system embedded software was not constructed yet. Recently, various weapons system embedded software were developed and used but they require the effort for the quality. In this paper, we developed the evaluation modules and the quality test tables which can evaluate based on ISO/IEC 12119 for weapons system embedded software evaluation.

Reconfigurable Test Execution Machine for Embedded System (재구성이 가능한 임베디드 시스템 테스트 실행기)

  • Kim, Kyoung Jin;Chung, Ki Hyun;Choi, Kyung Hee
    • KIPS Transactions on Software and Data Engineering
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    • v.3 no.7
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    • pp.243-254
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    • 2014
  • When building a testing environment with a testing platform, the configuration of test executor and its interface should be built to be appropriate for the system under test (SUT). That is, it is necessary to build the test executor and interface environment that can properly handle the input and output signals of SUT. If the testing platform is not extendable, it should be modified significantly whenever new SUTs and models are tested. It is a serious drawback that the test executor and interface configuration need to be modified depending on testing targets. To overcome the drawback, this paper proposes TEM(test Execution Machine), which allows for test executor to reconfigure its environment suitable to new SUTs by modifying the configuration file. The proposed TEM is verified through testing two real systems.

Simultaneous Static Testing of A/D and D/A Converters Using a Built-in Structure

  • Kim, Incheol;Jang, Jaewon;Son, HyeonUk;Park, Jaeseok;Kang, Sungho
    • ETRI Journal
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    • v.35 no.1
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    • pp.109-119
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    • 2013
  • Static testing of analog-to-digital (A/D) and digital-to-analog (D/A) converters becomes more difficult when they are embedded in a system on chip. Built-in self-test (BIST) reduces the need for external support for testing. This paper proposes a new static BIST structure for testing both A/D and D/A converters. By sharing test circuitry, the proposed BIST reduces the hardware overhead. Furthermore, test time can also be reduced using the simultaneous test strategy of the proposed BIST. The proposed method can be applied in various A/D and D/A converter resolutions and analog signal swing ranges. Simulation results are presented to validate the proposed method by showing how linearity errors are detected in different situations.

Parallel Testing Circuits with Versatile Data Patterns for SOP Image SRAM Buffer (SOP Image SRAM Buffer용 다양한 데이터 패턴 병렬 테스트 회로)

  • Jeong, Kyu-Ho;You, Jae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.9
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    • pp.14-24
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    • 2009
  • Memory cell array and peripheral circuits are designed for system on panel style frame buffer. Moreover, a parallel test methodology to test multiple blocks of memory cells is proposed to overcome low yield of system on panel processing technologies. It is capable of faster fault detection compared to conventional memory tests and also applicable to the tests of various embedded memories and conventional SRAMs. The various patterns of conventional test vectors can be used to enhance fault coverage. The proposed testing method is also applicable to hierarchical bit line and divided word line, one of design trends of recent memory architectures.

Development of Simulator for Hierarchical Battery Management System (계층적 배터리 관리 시스템 시뮬레이션 기술 개발)

  • Kang, Hyunwoo;Ahn, SungHo;Kim, Dongkyun
    • IEMEK Journal of Embedded Systems and Applications
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    • v.8 no.4
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    • pp.213-218
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    • 2013
  • In this research, we report on the development of simulation system for performance verification of BMS(Battery Management System) which is utilized in electric vehicles. In the industrial circles, a manufacturer of BMS typically tests their system with real battery packs. However, it takes a long time to test all functions of BMS. Here, we develop BMU(Battery Managament Unit) as an embedded board, which will be installed in electric vehicle for controlling battery packs. All other environment factors for testing BMU are developed in softwares in order to reduce the term of test. Especially, the proposed system consists of cell simulator and CMU(Cell Management Unit) simulator which simulate real battery cells and control battery cells. These simulators enable the BMU to test more battery cells. In addition, proposed system provides diagnosis program in order to diagnose and monitor the condition of BMS which makes the test of BMS more easily. In order to verify the performance of the developed simulator, we have performed the experiment with real battery packs and our simulator. Through comparing two results of experiments, we verify that developed simulator shows better performance in terms of less amount of testing duration though having high reliability.