• Korean Journal of Materials Research
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• v.28 no.11
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• pp.640-645
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• 2018

The design of non-precious electrocatalysts with low-cost, good stability, and an improved oxygen reduction reaction(ORR) to replace the platinium-based electrocatalyst is significant for application of fuel cells and metal-air batteries with high energy density. In this study, we synthesize iron-carbide($Fe_3C$) embedded nitrogen(N) doped carbon nanofiber(CNF) as electrocatalysts for ORRs using electrospinning, precursor deposition, and carbonization. To optimize electrochemical performance, we study the three stages according to different amounts of iron precursor. Among them, $Fe_3C$-embedded N doped CNF-1 exhibits the most improved electrochemical performance with a high onset potential of -0.18 V, a high $E_{1/2}$ of -0.29 V, and a nearly four-electron pathway (n = 3.77). In addition, $Fe_3C$-embedded N doped CNF-1 displays exellent long-term stabillity with the lowest ${\Delta}E_{1/2}=8mV$ compared to the other electrocatalysts. The improved electrochemical properties are attributed to synergestic effect of N-doping and well-dispersed iron carbide embedded in CNF. Consequently, $Fe_3C$-embedded N doped CNF is a promising candidate for non-precious electrocatalysts for high-performance ORRs.

• Proceedings of the Korean Geotechical Society Conference
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• 2008.10a
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• pp.559-566
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• 2008

This paper describes the state-of-the-art and -practice of embedded precast pile methods in Korea. The current status of embedded precast piling was reviewed in terms of its design, construction and quality assurance available for last decade in Korea. Based on the results obtained, some suggestions and authors' experience were proposed to design and construct the embedded precast pile foundations.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.277-278
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• 2012

• Proceedings of the Korean Information Science Society Conference
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• 2010.06b
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• pp.414-418
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• 2010

많은 분야에서 사용되는 matlab을 이용한 test방식을 좀 더 유연하고 원하는 기능을 만들어 사용하기 위해 matlab의 데이터 저장 파일인 mdl 파일의 내부 구조를 분석하고 구문 분석기로 파싱하여 실행 가능한 그래프를 나타내는 자료구조를 만든다.

• Journal of the Chungcheong Mathematical Society
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• v.24 no.3
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• pp.609-616
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• 2011

Observing that $vX{\times}vY$ is a Wallman realcompactification of $X{\times}Y$ if $v(X{\times}vY)=vX{\times}vY$, we show that $v(X{\times}Y)=vX{\times}vY$ if and only if $X{\times}Y$ is z-embedded in $vX{\times}vY$ and $vX{\times}vY$ is a Wallman compactification of $X{\times}Y$.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.45.4-45
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• 2001

In this paper, we present the wet-based monitoring system for industrial controller such as inverter controller for hydraulic elevators. The monitoring system is using an embedded web server on embedded Linux platform. The control board of system-On-Chip (SoC) is based on ARM7TDMI with Ethernet controller. Wet-based monitoring system using embedded Linux platform can reduce the cost, and have flexibility both of technical issues and locations If the system to be monitored. The system shows the feasibility of remote monitoring system based on embedded Linux platform.

• The KIPS Transactions:PartC
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• v.13C no.3 s.106
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• pp.375-382
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• 2006

As various kinds of embedded systems (or devices) become widely available, research on home network middleware which can access and control embedded home appliances are actively being progressed. However, there is a significant problem in applying the home network technology to embedded systems because of their limited storage space and low computing power. In this paper, we present a lightweight middleware for home network on embedded systems. Also, we propose a mechanism for mobility management which adopts the anycast technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.7 s.349
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• pp.38-49
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• 2006

In this paper, a novel concept based on embedded processor and reconfigurable logic is proposed for efficient manufacturing test and design verification. Unlike traditional gap between design verification and manufacturing test, proposed concept is to combine both design verification and manufacturing test. The semiconductor chip which is using the proposed concept is named "SwToC" and SwToC stands for System with Test On a Chip. SwToC has two main features. First, it has functional verification function on a chip and this function could be made by using embedded processor, reconfigurable logic and memory. Second, it has internal ATE on a chip and this feature also could be made by the same architecture. To evaluate the proposed SwToC, we have implemented SwToC using commercial FPGA device with embedded processor. Experimental results showed that the proposed chip is possible for real application and could have faster verification time than traditional simulation method. Moreover, test could be done using low cost ATE.

• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.1
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• pp.19-24
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• 2008

To reduce time-to-market, more and more embedded system developers and system-on-chip designers rely on microprocessor-based design methodology. ARM processor has been a major player in this industry over the last 10 years. However, there are many restrictions on developing embedded software using ARM processor in the early design stage. For those who are not familiar with embedded software development environment or who cannot afford to have an expensive embedded hardware equipment, testing their software on a real ARM hardware platform is a challenging job. To overcome such a problem, we have designed VMA (Virtual ARM Machine), which offers easier testing and debugging environment to ARM based embedded system developers. Major benefits that can be achieved by utilizing a virtual ARM platform are (1) reducing development cost, (2) lowering the entrance barrier for embedded system novices, and (3) making it easier to test and debug embedded software designs. Unlike many other purely software-oriented ARM simulators which are independent of real hardware platforms, VMA is specifically targeted on SYS-Lab 5000 ARM hardware platform, (designed by Libertron, Inc.), which means that VMA imitates behaviors of embedded software as if the software is running on the target embedded hardware as closely as possible. This paper will describe how VMA is designed and how VMA can be used to reduce design time and cost.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.11a
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• pp.38-38
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• 2004