• 센서학회지
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• 제15권1호
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• pp.58-64
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• 2006

In this study, we describe a low-temperature wafer-level thermocompression bonding using electroplated gold seal line and bonding pads by electroplating method for RF-MEMS devices. Silicon wafers, electroplated with gold (Au), were completely bonded at $320^{\circ}C$ for 30 min at a pressure of 2.5 MPa. The through-hole interconnection between the packaged devices and external terminal did not need metal filling process and was made by gold films deposited on the sidewall of the throughhole. This process was low-cost and short in duration. Helium leak rate, which is measured to evaluate the reliability of bonded wafers, was $2.7{\pm}0.614{\times}10^{-10}Pam^{3}/s$. The insertion loss of the CPW packaged was $-0.069{\sim}-0.085\;dB$. The difference of the insertion loss between the unpackaged and packaged CPW was less than -0.03. These values show very good RF characteristics of the packaging. Therefore, gold thermocompression bonding can be applied to high quality hermetic wafer level packaging of RF-MEMS devices.

• 대한전자공학회논문지
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• 제27권10호
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• pp.96-100
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• 1990

코디에라이트($2MgO,2Al_{2}O_{3},5SiO_{2}$)는 다층 IC 기관용 재료로써 최근에 큰 관심을 갖고 연구되어지고 있다. 졸겔법에 의해서 합성된 코디에라이트 기판위에 구리층을 만들고 동시 소성 분위기와 소성 온도 변화르 통해서 접합면의 형태변화를 분석함으로써 접합력이 우수한 소성 조건을 찾아보았다. 수분을 함유한 Ar가스( $Ar+H_{2}O$) 분위기에서 동시 소성하는 경우 좋은 접합 특성을 보여 주었으며 특히 접합 특성 향상에 승온 속도가 큰 영향을 미친다.

• 마이크로전자및패키징학회지
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• 제21권2호
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• pp.31-35
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• 2014

The thickness dependent electrical, structural, and optical properties of ZnO films grown by atomic layer deposition (ALD) at various growth temperatures were investigated. In order to deposit ZnO films, diethylzinc and deionized water were used as metal precursor and reactant, respectively. ALD process window was found at the growth temperature range from $150^{\circ}C$ to $250^{\circ}C$ with a growth rate of about $1.7{\AA}/cycle$. The electrical properties were studied by using van der Pauw method with Hall effect measurement. The structural and optical properties of ZnO films were analyzed by using X-ray diffraction, field emission scanning electron microscopy, and UV-visible spectrometry as a function of thickness values of ZnO films, which were selected by the lowest electrical resistivity. Finally, the figure of merit of ZnO films could be estimated as a function of the film thickness. As a result, this investigation of thickness dependent electrical, structural, and optical properties of ZnO films can provide proper information when applying to optoelectronic devices, such as organic light-emitting diodes and solar cells.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.357-358
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• 2005

Compact power amplifier modules (PAM) for WCDMA/KPCS and GSM/WCDMA dual-band applications based on multilayer low temperature co-fired ceramic (LTCC) substrates are presented in this paper. The proposed modules are composed of an InGaP/GaAs HBT PAs on top of the LTCC substrates and passive components such as RF chokes and capacitors which are embedded in the substrates. The overall size of the modules is less than 6mm $\times$ 6mm $\times$ 0.8mm. The measured result shows that the PAM delivers a power of 28 dBm with a power added efficiency (PAE) of more than 30 % at KPCS band. The adjacent-channel power ratio (ACPR) at 1.25-MHz and 2.25-MHz offset is -44dBc/30kHz and -60dBc/30kHz, respectively, at 28-dBm output power. Also, the PAM for WCDMA band exhibits an output power of 27 dBm and 32-dB gain at 1.95 GHz with a 3.4-V supply. The adjacent-channel leakage ratio (ACLR) at 5-MHz and 10-MHz offset is -37.5dBc/3.84MHz and -48dBc/3.84MHz, respectively. The measured result of the GSM PAM shows an output power of 33.4 dBm and a power gain of 30.4 dB at 900MHz with a 3.5V supply. The corresponding power added efficiency (PAE) is more than 52.6 %.

• 마이크로전자및패키징학회지
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• 제29권2호
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• pp.99-105
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• 2022

칩사이즈가 작아짐에 따라 선폭 또한 미세화되면서 인터커넥션의 밀집정도가 증가하고 있다. 그로 인해 캐패시터 층과 전기전도층의 저항 차이로 인해 RC delay가 문제되고 있다. 이를 해결하기 위해서는 높은 전기전도도의 전극과 낮은 유전율의 유전체 개발이 요구된다. 본 연구에서는 PCB (Print Circuit Board)의 회로를 외부요인으로부터 보호하는 상용 PSR (photo solder resist)과 우수한 내열 및 저유전 특성을 보유한 PI (polyimide)를 혼합하여 저유전체 잉크 개발을 진행하였다. 그 결과 PSR과 PI를 10:3으로 혼합한 잉크가 가장 우수한 결과를 보였으며 20 GHz와 28 GHz에서 각각 유전 상수 약 2.6, 2.37을 보였고, 유전손실은 약 0.022, 0.016으로 측정되었다. 차후 어플리케이션 적용 가능성 검증을 위해 테프론에 제작된 다양한 선폭의 전송선로에 평가하였으며 그 결과, PSR만 사용했을 때보다 PI와 혼합한 저유전체 잉크를 사용한 전송선로의 손실이 S21에서 평균 0.12 dB 덜 감소한 결과를 보였다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.110-110
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• 2000

Cantilever-shaped lateral field emitters were fabricated and their electrical characteristics were tested. As shown in Fig.1, poly-silicon cantilevers were fabricated by the surface micromachining and they were used to the vacuum magnetic field sensors. The tunneling devices were vacuum sealed with the tubeless packaging method, as shown in Fig.2 and Fig.3. The soda-lime glasses were used for better encapsulation, so the sputtered silicon and the glass layers on the soda-lime glasses were bonded together at 1x10$^{-6}$ Torr. The getter was activated after the vacuum sealing fur the stable emissions. The devices were tested outside of the vacuum chamber. Through vacuum packaging, the tunneling sensors can be utilized. Fig.4 shows that the sensor operates with the switching of the magnetic field. When the magnetic field was applied to the device, the anode currents were varied by the Lorentz force. The difference of anode currents can be varied with the strength of the applied magnetic field.

• 마이크로전자및패키징학회지
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• 제25권4호
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• pp.1-7
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• 2018

As the performance and density of IC (integrated circuit) devices increase, power and signal integrities in the global interconnects of advanced packaging technologies are becoming more difficult. Thus, the global interconnect technologies should be designed to accommodate increased input/output (I/O) counts, improved power grid network integrity, reduced RC delay, and improved electrical crosstalk stability. This requirement resulted in the fine-pitch interconnects with a low-k dielectric in 3D packaging or wafer level packaging structure. This paper reviews an organic-inorganic hybrid material as a potential dielectric candidate for the global interconnects. An organic-inorganic hybrid material called polysiloxane can provide spin process without high temperature curing, an excellent dielectric constant, and good mechanical properties.

• 한국전자파학회논문지
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• 제18권11호
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• pp.1291-1298
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• 2007

종래의 DGS를 이용한 초고주파 회로의 메탈 패키징(metal packaging)시 존재했던 DGS의 접지면 접촉 문제를 해결하고자, 본 논문에서는 이중 기판 결함 접지 구조 구조를 제안하고, 이를 1:4 비대칭 전력 분배기에 적용한 응용예를 제시한다. 이중 기판에 구현된 사각형 DGS는 종래와 같이 마이크로스트립 선로의 특성 임피던스를 표준형 선로보다 크게 증가시킨다. 이중 기판 DGS 구조를 형성하기 위하여 제2유전체 기판이 DGS가 구현된 기판면의 바닥 접지면에 접합된다. 따라서 제2유전체 기판이 메탈 패키지 바닥면에 장착되므로, DGS가 직접 패키지 접촉되는 것을 막을 수 있다. 초고주파 회로 응용예를 보이기 위해, 이중 기판 DGS를 이용하여 패키지 접지 문제를 해결한 1:4 비대칭 전력 분배기의 설계 및 측정 결과가 제시되는데, 시뮬레이션과 측정 결과에 있어서 잘 일치하는 특성을 보인다.

• ETRI Journal
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• 제26권6호
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• pp.589-596
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• 2004

Packaging technologies for a broadband and narrowband modulator with a traveling wave electro-absorption modulator (TWEAM) device were developed. In developing a broadband modulator, the effects of the device and packaging designs on the broadband performance were investigated. The optimized designs were obtained through a simulation with the result that we developed a broadband modulator with a 3 dB bandwidth of 38 GHz in the electrical-to-optical (E/O) response, an electrical return loss of less than -10 dB at up to 26 GHz, an rms jitter of 1.832 ps, and an extinction ratio of 5.38 dB in a 40 Gbps non-return to zero (NRZ) eye diagram. For analog application, the effect of the RF termination scheme on the fractional bandwidth was studied. The microstrip line with a double stub as a matching circuit and a laser trimming process were used to obtain an $S_{11}$ of -34.58 dB at 40 GHz and 2.9 GHz bandwidth of less than -15 dB.

• 마이크로전자및패키징학회지
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• 제27권1호
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• pp.17-24
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• 2020

As an interconnect scaling faces a technical bottleneck, the device stacking technologies have been developed for miniaturization, low cost and high performance. To manufacture a stacked device structure, a vertical interconnect becomes a key process to enable signal and power integrities. Most bonding materials used in stacked structures are currently solder or Cu pillar with Sn cap, but copper is emerging as the most important bonding material due to fine-pitch patternability and high electrical performance. Copper bonding has advantages such as CMOS compatible process, high electrical and thermal conductivities, and excellent mechanical integrity, but it has major disadvantages of high bonding temperature, quick oxidation, and planarization requirement. There are many copper bonding processes such as dielectric bonding, copper direct bonding, copper-oxide hybrid bonding, copper-polymer hybrid bonding, etc.. As copper bonding evolves, copper-oxide hybrid bonding is considered as the most promising bonding process for vertically stacked device structure. This paper reviews current research trends of copper bonding focusing on the key process of Cu-SiO₂ hybrid bonding.