• Applied Chemistry for Engineering
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• v.3 no.1
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• pp.88-99
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• 1992

For the development of semiconducting photoelectrode to be more stable and efficient in the process of photoelectrolysis of the water, pure titanium rods were oxidized by anodic oxidation, furance oxidation and flame oxidation and used as electrodes. The Indium islands were formed by electrodeposition of "In" thin film on $TiO_2$ and Ti by electrodeposition. Also $A1_2O_3$ and NiO islands were coated on Ti by the electron-beam evaporation technique. The maximum photoelectrochemical conversion efficiency(${\eta}$) was 0.98% for flame oxidized electrode($1200^{\circ}C$ for 2min in air). Anodically oxidized electrodes have photoelectrochemical conversion efficiency of 0.14%. Furnace oxidized electrode($800^{\circ}C$ for 10min in air) has 0.57% of photoelectrochemical efficiency and shows a band-gap energy of about 2.9eV. The $In_2O_3$ coated $TiO_2$ exhibits 0.8% of photoelectrochemical efficiency but much higher value of ${\eta}$ was obtained with the Increase of applied blas voltage. However, $Al_2O_3$ or NiO coated $TiO_2$ shows much low value of ${\eta}$. The efficiency was dependent on the presence of the metallic interstitial compound $TiO_{0+x}$(x<0.33) at the metal-semiconductor interface and the thickness of the suboxide layer and the external rutile scale.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.576-581
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• 2005

In this paper. the a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. High k gate dielectric is required for on-current, threshold voltage and breakdown characteristics of TFT Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_3N_4$. Ferroelectric increases on-current and decreases threshold voltage of TFT and also ran improve breakdown characteristics.$SrTiO_4$ thin film is deposited by e-beam evaporation. Deposited films are annealed for 1 hour in N2 ambient at $150^{\circ}C\~600^{\circ}C$. Dielectric constant of ferroelectric is about 60-100 and breakdown field is about IMV/cm. In this paper, the TFT using ferroelectric consisted of double layer gate insulator to minimize the leakage current. a-SiN:H, a-Si:H (n-type a-Si:H) are deposited onto $SrTiO_3$ film to make MFNS(Metal/ferroelectric/a-SiN:H/a-Si:H) by PECVD. In this paper, TFR using ferroelectric has channel length of$8~20{\mu}m$ and channel width of $80~200{\mu}m$. And it shows that drain current is $3.4{\mu}A$at 20 gate voltage, $I_{on}/I_{off}$ is a ratio of $10^5\~10^8,\;and\;V_{th}$ is$4\~5\;volts$, respectively. In the case of TFT without having ferroelectric, it indicates that the drain current is $1.5{\mu}A$ at 20gate voltage and $V_{th}$ is $5\~6$ volts. If properties of the ferroelectric thin film are improved, the performance of TFT using this ferroelectric thin film can be advanced.

• Journal of the Korean Magnetics Society
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• v.12 no.5
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• pp.184-188
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• 2002

The Cu/Ni/Cu(002)/Si(100) films which have perpendicular magnetic anisotropy were deposited by e-beam evaporation methods. From the reflection high energy electron diffraction pattern, the films were confirmed to be grown epitaxially on silicon. After 2X lots ions/$\textrm{cm}^2$ C+ irradiation, magnetic easy-axis was changed from surface normal to in-plane as shown in the hysteresis loop of magneto-optical Kerr effects. It became manifest from analysis of X-ray reflectivity and grazing incident X-ray diffraction that even though interface between top Cu layer and Ni layer became rougher, the contrast of Cu and Ni's electron density became manifest after ion irradiation. In addition, the strain after deposition of the films was relaxed after ion irradiation. Strain relaxation related with change of magnetic properties and mechanism of intermixed layer's formation was explained by thermo-chemical driving force due to elastic and inelastic collision of ions.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.188.1-188.1
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• 2015

For present investigation Fe/MgO/Fe/Co multilayer stack is grown on Si substrate using e-beam evaporation in ultrahigh vacuum. This stack is irradiated perpendicularly by 120 MeV $Ag^{8+}$ at different fluences ranging from $1{\times}10^{11}$ to $1{\times}10^{13}ions/cm^2$ in high vacuum using 15UD Pelletron Accelerator at Inter University Accelerator Centre, New Delhi. Magnetic measurements carried out on pre and post irradiated stacks show significant changes in the shape of perpendicular hysteresis which is relevant with previous observation of re-orientation of magnetic moment along the direction of ion trajectory. However increase in plane squareness may be due to the modification of interface structure of stacks. X-ray reflectivity measurements show onset of interface roughness and interface mixing. X-ray diffraction measurements carried out using synchrotron radiation shows amorphous nature of MgO and Co layer in the stack. Peak corresponding body centered Fe [JCPDS-06-0696] is observed in X-ray diffraction pattern of pre and post irradiated stacks. Peak broadening shows granular nature of Fe layer. Estimated crystallite size is $22{\pm}1nm$ for pre-irradiated stack. Crystallite size first increases with irradiation then decreases. Structural quality of these stacks was further studied using transmission electron microscopic measurements. Thickness from these measurements are 54, 36, 23, 58 and 3 nm respectively for MgO, Fe, MgO, Fe+Co and Au layers in the stack. These measurements envisage poor crystallinity of different layers. Interfaces are not clear which indicate mixing at interface. With increase fluence mixing and diffusion was increased in the stack. X-ray absorption spectroscopic measurements carried out on these stacks show changes of Fe valence state after irradiation along with change of O(2p)-metal (3d) hybridized state. Valence state change predicts oxide formation at interface which causes enhanced in-plane magnetization.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.296-296
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• 2014

We investigate experimentally and theoretically the splitting of surface plasmon (SP) resonance peaks under TE- and TM-polarized illumination. The SP structure at infrared wavelength is fabricated with a 2-dimensional square periodic array of circular holes penetrating through Au (gold) film. In brief, the processing steps to fabricate the SP structure are as follows. (i) A standard optical lithography was performed to produce to a periodic array of photoresist (PR) circular cylinders. (ii) After the PR pattern, e-beam evaporation was used to deposit a 50-nm thick layer of Au. (iii) A lift-off processing with acetone to remove the PR layer, leading to final structure (pitch, $p=2.2{\mu}m$; aperture size, $d=1.1{\mu}m$) as shown in Fig. 1(a). The transmission is measured using a Nicolet Fourier-transform infrared spectroscopy (FTIR) at the incident angle from $0^{\circ}$ to $36^{\circ}$ with a step of $4^{\circ}$ both in TE and TM polarization. Measured first and second order SP resonances at interface between Au and GaAs exhibit the splitting into two branches under TM-polarized light as shown in Fig. 1(b). However, as the incidence angle under TE polarization is increased, the $1^{st}$ order SP resonance peak blue-shifts slightly while the splitting of $2^{nd}$ order SP resonance peak tends to be larger (not shown here). For the purpose of understanding our experimental results qualitatively, SP resonance peak wavelengths can be calculated from momentum matching condition (black circle depicted in Fig. 2(b)), $k_{sp}=k_{\parallel}{\pm}iG_x{\pm}jG_y$, where $k_{sp}$ is the SP wavevector, $k_{\parallel}$ is the in-plane component of incident light wavevector, i and j are SP coupling order, and G is the grating momentum wavevector. Moreover, for better understanding we performed 3D full field electromagnetic simulations of SP structure using a finite integration technique (CST Microwave Studio). Fig. 1(b) shows an excellent agreement between the experimental, calculated and CST-simulated splitting of SP resonance peaks with various incidence angles under TM-polarized illumination (TE results are not shown here). The simulated z-component electric field (Ez) distribution at incident angle, $4^{\circ}$ and $16^{\circ}$ under TM polarization and at the corresponding SP resonance wavelength is shown in Fig. 1(c). The analysis and comparison of theoretical results with experiment indicates a good agreement of the splitting behavior of the surface plasmon resonance modes at oblique incidence both in TE and TM polarization.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.358-359
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• 2012

최근 분극 특성이 상이한 무분극 GaN 에피성장에 관한 심도 있는 연구와 함께 전자-전공 캐리어의 주입 및 캐리어의 거동, 방출되는 편광 특성 및 다양한 물리적 특성들에 대해 보고되고 있으며, 광학적 특성 및 물리적 특성의 확보를 위한 많은 연구가 활발히 진행 중이다 [1]. GaN의 ohmic 접촉(ohmic contact)의 형성은 발광 다이오드(light emitting diode), 레이저 다이오드(Laser), 태양전지(solar cell)와 같은 고신뢰도, 고효율 광전자 소자를 제조하기 위해서는 매우 중요하다 [2]. 그러나 이와 함께 병행 되어야 할 무분극 p-GaN 의 ohmic contact에 관한 연구는 많이 이루어지고 있지 않는 실정이다. 따라서 본 논문에서는 r-plane 사파이어 기판 상에 성장된 p-GaN에서의 ohmic 접촉 형성 연구를 위하여 Ni/Au ohmic 전극의 접촉저항 특성을 연구하였다. 본 실험에서는 성장된 a-plane GaN의 Hole농도가 $3.09{\times}1017cm3$ 인 시편을 사용하였다. E-beam evaporation 장비를 이용하여 Ni/Au를 각각 20 nm 그리고80 nm 증착 하였으며 비접촉저항을 측정하기 위해 Circle-Transfer Length Method (C-TLM) 패턴을 사용하였다. 샘플은 RTA (Rapid Thermal Annealing)를 사용하여 $300^{\circ}C$에서 $700^{\circ}C$까지 온도를 변화시키며 전기적 특성을 비교하여 그림 1(a) 나타내었다. 그림에서 알 수 있듯이 $400^{\circ}C$에서 가장 낮은 비접촉저항 값인 $6.95{\times}10-3{\Omega}cm2$를 얻을 수 있음을 발견하였다. 이 때의 I-V curve 도 그림1(b)에 나타낸 바와 같이 열처리에 의해 크게 향상됨을 알 수 있다. 그러나, $500^{\circ}C$ 이상 온도를 증가시키면 다시 비접촉 저항이 증가하는 것을 관찰하였다. XRD (x-Ray Diffraction) 분석을 통하여 $400^{\circ}C$ 이상열처리 온도가 증가하면 금속 표면에 $NiO_2$가 형성되며, 이에 따라 오믹특성이 저하 된다고 사료된다. 또한 $Ni_3N$의 존재를 확인 하였으며 이는 nonpolar surface의 특성으로 인해 nitrogen out diffusion 현상이 동시에 발생하여 계면에는 dopant로 작용하는 질소 공공을 남기고 표면에 $Ni_3N$을 형성하여 ohmic contact의 특성이 저하되기 때문인 것으로 사료된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.169-169
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• 2010

As display industry requires various applications for future display technology, which can guarantees high level of flexibility and transparency on display panel, oxide semiconductor materials are regarded as one of the best candidates. $InGaZnO_4$(IGZO) has gathered much attention as a post-transition metal oxide used in active layer in thin-film transistor. Due to its high mobility fabricated at low temperature fabrication process, which is proper for application to display backplanes and use in flexible and/or transparent electronics. Electrical performance of amorphous oxide semiconductors depends on the resistance of the interface between source/drain metal contact and active layer. It is also affected by sheet resistance on IGZO thin film. Controlling contact/sheet resistance has been a hot issue for improving electrical properties of AOS(Amorphous oxide semiconductor). To overcome this problem, post-annealing has been introduced. In other words, through post-annealing process, saturation mobility, on/off ratio, drain current of the device all increase. In this research, we studied on the relation between device's resistance and post-annealing temperature. So far as many post-annealing effects have been reported, this research especially analyzed the change of electrical properties by increasing post-annealing temperature. We fabricated 6 main samples. After a-IGZO deposition, Samples were post-annealed in 5 different temperatures; as-deposited, $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$, $400^{\circ}C$ and $500^{\circ}C$. Metal deposition was done on these samples by using Mo through E-beam evaporation. For analysis, three analysis methods were used; IV-characteristics by probe station, surface roughness by AFM, metal oxidation by FE-SEM. Experimental results say that contact resistance increased because of the metal oxidation on metal contact and rough surface of a-IGZO layer. we can suggest some of the possible solutions to overcome resistance effect for the improvement of TFT electrical performances.

• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Korean Journal of Metals and Materials
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• v.47 no.5
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.12
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• pp.10-15
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• 2020

Ultraviolet rays, which have wavelengths smaller than 400 nm, are very harmful to the eyes. Recently, high-energy visible light was also revealed to be harmful to retinal cells. Therefore, polymer eyeglass lenses that can block UV and high-energy visible light are needed for eye health. In this study, high-refractive-index polymer eyeglass lens, n=1.67, were manufactured using the injection-mold method with the m-xylene diisocyanate monomer, 2,3-bis((2-mercaptoethyl)thio)-1-propanethiol monomer, benzotriazole UV absorber, release of alkyl phosphoric ester, dye mixture of CI solvent violet 13, and catalyst of dibutyltin dichloride mixture. A multi-layer anti-reflection coating was applied to manufactured polymer eyeglass lenses for both sides using an E-beam evaporation system. The optical properties of the manufactured lenses with the UV and high-energy visible light-blocking function were analyzed by UV-visible spectrophotometry. As a result, the polymer eyeglass lens with a UV absorber of 0.5 wt. % blocked 99% of UV and high-energy visible light shorter than 411 nm. The average transmittance of the polymer eyeglass lens with a UV absorber of 0.5wt.% was 97.9% in the range of 460 ~ 660 nm for photopic eye sensitivity higher than 10%. Therefore, clear image acquisition in photopic vision is possible.